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llvm-mirror/test/MC
Wouter van Oortmerssen 2eaa4e6cf6 [WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs
This adds 4 new reloc types.

A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (and often truncated results from functions returning 64-bit values) have been upgraded to uint64_t. This is not comprehensive: it is only the values that come in contact with the new relocation values and their dependents.

A new tablegen mapping was added to automatically upgrade loads/stores in the assembler, which otherwise has no way to select for these instructions (since they are indentical other than for the offset immediate). It follows a similar technique to https://reviews.llvm.org/D53307

Differential Revision: https://reviews.llvm.org/D81704
2020-06-15 10:07:42 -07:00
..
AArch64 [llvm][ELF][AArch64] Handle R_AARCH64_PLT32 relocation 2020-06-10 11:34:16 -07:00
AMDGPU [AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants. 2020-05-28 15:10:55 +03:00
ARM [DebugInfo] Report the format of location and range lists [9/10] 2020-06-02 17:55:31 +07:00
AsmParser Add AIX to the test macro-same-context XFAIL list 2020-05-25 10:19:45 -04:00
AVR [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [MC][COFF][ELF] Reject instructions in IMAGE_SCN_CNT_UNINITIALIZED_DATA/SHT_NOBITS sections 2020-04-15 21:02:47 -07:00
Disassembler [PowerPC] Add some InstAlias for mtspr/mfspr instructions 2020-06-15 02:43:13 +00:00
ELF [MC][X86] Allow SHT_PROGBITS for .eh_frame on x86-64 2020-04-16 10:42:52 -07:00
Hexagon [Hexagon] pX.new cannot be used with p3:0 as producer 2020-05-19 17:06:34 -05:00
Lanai
MachO [DebugInfo] Report the format of address range tables [5/10] 2020-06-02 17:55:30 +07:00
Mips [DebugInfo] Report the format of call frame information entries [6/10] 2020-06-02 17:55:30 +07:00
MSP430 [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
PowerPC [PowerPC] Add some InstAlias for mtspr/mfspr instructions 2020-06-15 02:43:13 +00:00
RISCV Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC" 2020-05-22 05:36:15 -06:00
Sparc [Object] Change ELFObjectFile<ELFT>::getFileFormatName() to use BFD names 2020-03-16 07:42:04 -07:00
SystemZ [SystemZ] Allow specifying plain register numbers in AsmParser 2020-04-29 20:42:30 +02:00
VE [VE] Support relocation information in MC layer 2020-06-15 11:24:53 +02:00
WebAssembly [WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs 2020-06-15 10:07:42 -07:00
X86 [X86] Force VIA PadLock crypto instructions to emit a 0xF3 prefix when they encode to match what GNU as does. 2020-06-11 12:59:21 -07:00