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d09b64fc25
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558
12 lines
282 B
LLVM
12 lines
282 B
LLVM
; RUN: llc < %s -mcpu=generic -march=x86 | not grep lea
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; RUN: llc < %s -mcpu=generic -march=x86 | grep {movl %ebp}
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declare void @bar(<2 x i64>* %n)
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define void @foo(i64 %h) {
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%k = trunc i64 %h to i32
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%p = alloca <2 x i64>, i32 %k
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call void @bar(<2 x i64>* %p)
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ret void
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}
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