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c3cc8fa604
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
22 lines
910 B
LLVM
22 lines
910 B
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s
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; rdar://6992609
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; CHECK: movl [[EDX:%e..]], 4(%esp)
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; CHECK: movl [[EDX]], 4(%esp)
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target triple = "i386-apple-darwin9.0"
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i64 @_OSSwapInt64(i64 %_data) nounwind {
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entry:
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%retval = alloca i64 ; <i64*> [#uses=2]
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%_data.addr = alloca i64 ; <i64*> [#uses=4]
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store i64 %_data, i64* %_data.addr
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%tmp = load i64* %_data.addr ; <i64> [#uses=1]
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%0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1]
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store i64 %0, i64* %_data.addr
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%tmp1 = load i64* %_data.addr ; <i64> [#uses=1]
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store i64 %tmp1, i64* %retval
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%1 = load i64* %retval ; <i64> [#uses=1]
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ret i64 %1
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}
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