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https://github.com/RPCS3/llvm-mirror.git
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d99f6d6d8b
The new version has several advantages:
1) IMSHO it's more readable and neater
2) It handles loads and stores properly
3) It can handle any number of incoming blocks rather than just two. I'll be taking advantage of this in a followup patch.
With this change we can now finally sink load-modify-store idioms such as:
if (a)
return *b += 3;
else
return *b += 4;
=>
%z = load i32, i32* %y
%.sink = select i1 %a, i32 5, i32 7
%b = add i32 %z, %.sink
store i32 %b, i32* %y
ret i32 %b
When this works for switches it'll be even more powerful.
Round 4. This time we should handle all instructions correctly, and not replace any operands that need to be constant with variables.
This was really hard to determine safely, so the helper function should be put into the Instruction API. I'll do that as a followup.
llvm-svn: 279443
313 lines
6.3 KiB
LLVM
313 lines
6.3 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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define zeroext i1 @test1(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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; CHECK-LABEL: test1
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; CHECK: add
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; CHECK: select
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; CHECK: icmp
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; CHECK-NOT: br
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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br label %if.end
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if.else:
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%add = add i32 %nblks, %blksB
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%cmp2 = icmp ule i32 %add, %blksA
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%frombool3 = zext i1 %cmp2 to i8
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br label %if.end
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if.end:
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%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.else ]
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%tobool4 = icmp ne i8 %obeys.0, 0
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ret i1 %tobool4
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}
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define zeroext i1 @test2(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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; CHECK-LABEL: test2
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; CHECK: add
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; CHECK: select
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; CHECK: icmp
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; CHECK-NOT: br
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if.then:
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%cmp = icmp uge i32 %blksA, %nblks
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%frombool1 = zext i1 %cmp to i8
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br label %if.end
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if.else:
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%add = add i32 %nblks, %blksB
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%cmp2 = icmp uge i32 %blksA, %add
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%frombool3 = zext i1 %cmp2 to i8
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br label %if.end
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if.end:
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%obeys.0 = phi i8 [ %frombool1, %if.then ], [ %frombool3, %if.else ]
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%tobool4 = icmp ne i8 %obeys.0, 0
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ret i1 %tobool4
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}
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declare i32 @foo(i32, i32) nounwind readnone
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define i32 @test3(i1 zeroext %flag, i32 %x, i32 %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%x0 = call i32 @foo(i32 %x, i32 0) nounwind readnone
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%y0 = call i32 @foo(i32 %x, i32 1) nounwind readnone
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br label %if.end
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if.else:
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%x1 = call i32 @foo(i32 %y, i32 0) nounwind readnone
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%y1 = call i32 @foo(i32 %y, i32 1) nounwind readnone
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br label %if.end
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if.end:
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%xx = phi i32 [ %x0, %if.then ], [ %x1, %if.else ]
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%yy = phi i32 [ %y0, %if.then ], [ %y1, %if.else ]
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%ret = add i32 %xx, %yy
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ret i32 %ret
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}
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; CHECK-LABEL: test3
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; CHECK: select
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; CHECK: call
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; CHECK: call
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; CHECK: add
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; CHECK-NOT: br
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define i32 @test4(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test4
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; CHECK: select
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; CHECK: store
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; CHECK-NOT: store
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define i32 @test5(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test5
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; CHECK: store volatile
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; CHECK: store
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define i32 @test6(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %x, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%b = add i32 %x, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test6
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; CHECK: select
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; CHECK: store volatile
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; CHECK-NOT: store
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define i32 @test7(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%z = load volatile i32, i32* %y
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test7
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; CHECK-DAG: select
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; CHECK-DAG: load volatile
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; CHECK: store volatile
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; CHECK-NOT: load
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; CHECK-NOT: store
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; %z and %w are in different blocks. We shouldn't sink the add because
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; there may be intervening memory instructions.
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define i32 @test8(i1 zeroext %flag, i32 %x, i32* %y) {
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entry:
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%z = load volatile i32, i32* %y
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test8
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; CHECK: add
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; CHECK: add
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; The extra store in %if.then means %z and %w are not equivalent.
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define i32 @test9(i1 zeroext %flag, i32 %x, i32* %y, i32* %p) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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store i32 7, i32* %p
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%z = load volatile i32, i32* %y
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store i32 6, i32* %p
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%a = add i32 %z, 5
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store volatile i32 %a, i32* %y
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br label %if.end
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if.else:
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%w = load volatile i32, i32* %y
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%b = add i32 %w, 7
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store volatile i32 %b, i32* %y
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test9
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; CHECK: add
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; CHECK: add
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%struct.anon = type { i32, i32 }
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; The GEP indexes a struct type so cannot have a variable last index.
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define i32 @test10(i1 zeroext %flag, i32 %x, i32* %y, %struct.anon* %s) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %x, 5
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%gepa = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 0
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store volatile i32 %x, i32* %gepa
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br label %if.end
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if.else:
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%dummy1 = add i32 %x, 6
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%gepb = getelementptr inbounds %struct.anon, %struct.anon* %s, i32 0, i32 1
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store volatile i32 %x, i32* %gepb
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br label %if.end
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if.end:
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ret i32 1
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}
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; CHECK-LABEL: test10
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; CHECK: getelementptr
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; CHECK: getelementptr
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; CHECK: phi
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; CHECK: store volatile
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; The shufflevector's mask operand cannot be merged in a PHI.
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define i32 @test11(i1 zeroext %flag, i32 %w, <2 x i32> %x, <2 x i32> %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %w, 5
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%sv1 = shufflevector <2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 0, i32 1>
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br label %if.end
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if.else:
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%dummy1 = add i32 %w, 6
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%sv2 = shufflevector <2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 1, i32 0>
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br label %if.end
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if.end:
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%p = phi <2 x i32> [ %sv1, %if.then ], [ %sv2, %if.else ]
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ret i32 1
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}
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; CHECK-LABEL: test11
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; CHECK: shufflevector
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; CHECK: shufflevector
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; We can't common an intrinsic!
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define i32 @test12(i1 zeroext %flag, i32 %w, i32 %x, i32 %y) {
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entry:
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br i1 %flag, label %if.then, label %if.else
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if.then:
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%dummy = add i32 %w, 5
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%sv1 = call i32 @llvm.ctlz.i32(i32 %x)
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br label %if.end
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if.else:
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%dummy1 = add i32 %w, 6
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%sv2 = call i32 @llvm.cttz.i32(i32 %x)
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br label %if.end
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if.end:
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%p = phi i32 [ %sv1, %if.then ], [ %sv2, %if.else ]
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ret i32 1
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}
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declare i32 @llvm.ctlz.i32(i32 %x) readnone
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declare i32 @llvm.cttz.i32(i32 %x) readnone
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; CHECK-LABEL: test12
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; CHECK: call i32 @llvm.ctlz
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; CHECK: call i32 @llvm.cttz
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