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8d1918703c
AVX is available, and generally tidy up things surrounding UNPCK formation. Originally, I was thinking that the only advantage of PSHUFD over UNPCK instruction variants was its free copy, and otherwise we should use the shorter encoding UNPCK instructions. This isn't right though, there is a larger advantage of being able to fold a load into the operand of a PSHUFD. For UNPCK, the operand *must* be in a register so it can be the second input. This removes the UNPCK formation in the target-specific DAG combine for v4i32 shuffles. It also lifts the v8 and v16 cases out of the AVX-specific check as they are potentially replacing multiple instructions with a single instruction and so should always be valuable. The floating point checks are simplified accordingly. This also adjusts the formation of PSHUFD instructions to attempt to match the shuffle mask to one which would fit an UNPCK instruction variant. This was originally motivated to allow it to match the UNPCK instructions in the combiner, but clearly won't now. Eventually, we should add a MachineCombiner pass that can form UNPCK instructions post-RA when the operand is known to be in a register and thus there is no loss. llvm-svn: 217755
129 lines
5.2 KiB
LLVM
129 lines
5.2 KiB
LLVM
; RUN: llc -O3 -mtriple=x86_64-apple-macosx -o - < %s -mattr=+avx2 -enable-unsafe-fp-math -mcpu=core2 | FileCheck %s
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; Check that the ExeDepsFix pass correctly fixes the domain for broadcast instructions.
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; <rdar://problem/16354675>
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; CHECK-LABEL: ExeDepsFix_broadcastss
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <4 x float> @ExeDepsFix_broadcastss(<4 x float> %arg, <4 x float> %arg2) {
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%bitcast = bitcast <4 x float> %arg to <4 x i32>
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%and = and <4 x i32> %bitcast, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%floatcast = bitcast <4 x i32> %and to <4 x float>
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%max_is_x = fcmp oge <4 x float> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x float> %floatcast, <4 x float> %arg2
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ret <4 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss256
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <8 x float> @ExeDepsFix_broadcastss256(<8 x float> %arg, <8 x float> %arg2) {
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%bitcast = bitcast <8 x float> %arg to <8 x i32>
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%and = and <8 x i32> %bitcast, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%floatcast = bitcast <8 x i32> %and to <8 x float>
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%max_is_x = fcmp oge <8 x float> %floatcast, %arg2
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%max = select <8 x i1> %max_is_x, <8 x float> %floatcast, <8 x float> %arg2
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ret <8 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss_inreg
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <4 x float> @ExeDepsFix_broadcastss_inreg(<4 x float> %arg, <4 x float> %arg2, i32 %broadcastvalue) {
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%bitcast = bitcast <4 x float> %arg to <4 x i32>
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%in = insertelement <4 x i32> undef, i32 %broadcastvalue, i32 0
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%mask = shufflevector <4 x i32> %in, <4 x i32> undef, <4 x i32> zeroinitializer
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%and = and <4 x i32> %bitcast, %mask
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%floatcast = bitcast <4 x i32> %and to <4 x float>
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%max_is_x = fcmp oge <4 x float> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x float> %floatcast, <4 x float> %arg2
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ret <4 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss256_inreg
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <8 x float> @ExeDepsFix_broadcastss256_inreg(<8 x float> %arg, <8 x float> %arg2, i32 %broadcastvalue) {
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%bitcast = bitcast <8 x float> %arg to <8 x i32>
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%in = insertelement <8 x i32> undef, i32 %broadcastvalue, i32 0
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%mask = shufflevector <8 x i32> %in, <8 x i32> undef, <8 x i32> zeroinitializer
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%and = and <8 x i32> %bitcast, %mask
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%floatcast = bitcast <8 x i32> %and to <8 x float>
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%max_is_x = fcmp oge <8 x float> %floatcast, %arg2
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%max = select <8 x i1> %max_is_x, <8 x float> %floatcast, <8 x float> %arg2
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ret <8 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd
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; In that case the broadcast is directly folded into vandpd.
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK:ret
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define <2 x double> @ExeDepsFix_broadcastsd(<2 x double> %arg, <2 x double> %arg2) {
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%bitcast = bitcast <2 x double> %arg to <2 x i64>
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%and = and <2 x i64> %bitcast, <i64 2147483647, i64 2147483647>
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%floatcast = bitcast <2 x i64> %and to <2 x double>
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%max_is_x = fcmp oge <2 x double> %floatcast, %arg2
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%max = select <2 x i1> %max_is_x, <2 x double> %floatcast, <2 x double> %arg2
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ret <2 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd256
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; CHECK: broadcastsd
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK: ret
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define <4 x double> @ExeDepsFix_broadcastsd256(<4 x double> %arg, <4 x double> %arg2) {
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%bitcast = bitcast <4 x double> %arg to <4 x i64>
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%and = and <4 x i64> %bitcast, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
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%floatcast = bitcast <4 x i64> %and to <4 x double>
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%max_is_x = fcmp oge <4 x double> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x double> %floatcast, <4 x double> %arg2
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ret <4 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd_inreg
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; ExeDepsFix works top down, thus it coalesces vpunpcklqdq domain with
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; vpand and there is nothing more you can do to match vmaxpd.
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; CHECK: vmovlhps
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; CHECK: vandps
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; CHECK: vmaxpd
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; CHECK: ret
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define <2 x double> @ExeDepsFix_broadcastsd_inreg(<2 x double> %arg, <2 x double> %arg2, i64 %broadcastvalue) {
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%bitcast = bitcast <2 x double> %arg to <2 x i64>
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%in = insertelement <2 x i64> undef, i64 %broadcastvalue, i32 0
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%mask = shufflevector <2 x i64> %in, <2 x i64> undef, <2 x i32> zeroinitializer
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%and = and <2 x i64> %bitcast, %mask
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%floatcast = bitcast <2 x i64> %and to <2 x double>
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%max_is_x = fcmp oge <2 x double> %floatcast, %arg2
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%max = select <2 x i1> %max_is_x, <2 x double> %floatcast, <2 x double> %arg2
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ret <2 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd256_inreg
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; CHECK: broadcastsd
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK: ret
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define <4 x double> @ExeDepsFix_broadcastsd256_inreg(<4 x double> %arg, <4 x double> %arg2, i64 %broadcastvalue) {
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%bitcast = bitcast <4 x double> %arg to <4 x i64>
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%in = insertelement <4 x i64> undef, i64 %broadcastvalue, i32 0
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%mask = shufflevector <4 x i64> %in, <4 x i64> undef, <4 x i32> zeroinitializer
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%and = and <4 x i64> %bitcast, %mask
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%floatcast = bitcast <4 x i64> %and to <4 x double>
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%max_is_x = fcmp oge <4 x double> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x double> %floatcast, <4 x double> %arg2
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ret <4 x double> %max
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}
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