Yichao Yu b55be14233 Fix R_AARCH64_MOVW_UABS_G3 relocation ... Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....) Reviewers: t.p.northover, lhames Subscribers: davide, aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D27609 llvm-svn: 289880		2016-12-15 22:36:53 +00:00
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IntelJITEvents
Interpreter	IR: Change the gep_type_iterator API to avoid always exposing the "current" type.	2016-12-02 02:24:42 +00:00
MCJIT	Use StringRef instead of raw pointer in ExecutionEngine	2016-10-01 06:22:04 +00:00
OProfileJIT
Orc	Fix some Clang-tidy and Include What You Use warnings; other minor fixes (NFC).	2016-11-30 17:48:10 +00:00
RuntimeDyld	Fix R_AARCH64_MOVW_UABS_G3 relocation	2016-12-15 22:36:53 +00:00
CMakeLists.txt
ExecutionEngine.cpp	Replace APFloatBase static fltSemantics data members with getter functions	2016-12-14 11:57:17 +00:00
ExecutionEngineBindings.cpp	Use StringRef instead of raw pointer in ExecutionEngine	2016-10-01 06:22:04 +00:00
GDBRegistrationListener.cpp	Do a sweep over move ctors and remove those that are identical to the default.	2016-10-20 12:20:28 +00:00
LLVMBuild.txt
SectionMemoryManager.cpp
TargetSelect.cpp