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Geoff Berry da5a594e00 [AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.
This re-factoring could cause the following slight changes in generated
code, though none were observed during testing:

- MachineScheduler could decide not to cluster some loads/stores if
  there are other load/stores with non-pairable opcodes that have the
  same base register and offset as a pairable set of load/stores.  One
  case of different MachineScheduler pairing did show up in my testing,
  but it wasn't due to this issue, but due
  BaseMemOpClusterMutation::clusterNeighboringMemOps() being unstable
  w.r.t. the order it considers memory operations.  See PR28942.

- The ImplicitNullChecks optimization could be done for more load/store
  opcodes.  This optimization isn't done for C/C++ code, so it didn't
  show up in my testing.

Reviewers: mcrosier, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D23365

llvm-svn: 278515
2016-08-12 15:26:00 +00:00
2016-08-04 10:24:48 +00:00
2016-01-26 21:29:08 +00:00
2014-03-02 13:08:46 +00:00
2016-06-23 22:07:21 +00:00
2016-08-04 10:24:48 +00:00
2016-08-02 19:25:17 +00:00
2016-01-26 21:29:08 +00:00
2016-08-11 18:34:29 +00:00
2016-08-02 13:26:07 +00:00
2016-07-21 16:46:44 +00:00

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