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llvm-mirror/lib/CodeGen/SelectionDAG
Tomas Matheson f90afcb5c6 Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"
This reverts commit 3338290c187b254ad071f4b9cbf2ddb2623cefc0.

Broke expensive checks on debian.
2021-04-30 16:53:14 +01:00
..
CMakeLists.txt
DAGCombiner.cpp [RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32. 2021-04-29 08:20:09 -07:00
FastISel.cpp Revert "Allow invokable sub-classes of IntrinsicInst" 2021-04-20 15:38:38 -07:00
FunctionLoweringInfo.cpp [NFC] Wisely nest dyn_cast in FunctionLoweringInfo 2021-03-16 10:22:44 +01:00
InstrEmitter.cpp [DebugInfo] Emit DBG_VALUE_LIST from ISel 2021-03-09 12:17:39 +00:00
InstrEmitter.h [DebugInfo] Emit DBG_VALUE_LIST from ISel 2021-03-09 12:17:39 +00:00
LegalizeDAG.cpp [SelectionDAG][AArch64][SVE] Perform SETCC condition legalization in LegalizeVectorOps 2021-03-29 15:32:25 +01:00
LegalizeFloatTypes.cpp Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0" 2021-04-30 16:53:14 +01:00
LegalizeIntegerTypes.cpp [SelectionDAG] Use a VTSDNode to store the saturation width for FP_TO_SINT_SAT/FP_TO_UINT_SAT 2021-04-27 14:38:42 -07:00
LegalizeTypes.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
LegalizeTypes.h Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0" 2021-04-30 16:53:14 +01:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp [SelectionDAG][AArch64][SVE] Perform SETCC condition legalization in LegalizeVectorOps 2021-03-29 15:32:25 +01:00
LegalizeVectorTypes.cpp [DAGCombiner] Allow operand of step_vector to be negative. 2021-04-22 20:58:03 +08:00
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp [DebugInfo] Emit DBG_VALUE_LIST from ISel 2021-03-09 12:17:39 +00:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp [SelectionDAG] Use range-based for loops (NFC) 2021-02-09 22:14:30 -08:00
SDNodeDbgValue.h Reapply "[DebugInfo] Correctly track SDNode dependencies for list debug values" 2021-04-12 12:51:29 +01:00
SelectionDAG.cpp [SelectionDAG] Use a VTSDNode to store the saturation width for FP_TO_SINT_SAT/FP_TO_UINT_SAT 2021-04-27 14:38:42 -07:00
SelectionDAGAddressAnalysis.cpp
SelectionDAGBuilder.cpp [SelectionDAG] Use a VTSDNode to store the saturation width for FP_TO_SINT_SAT/FP_TO_UINT_SAT 2021-04-27 14:38:42 -07:00
SelectionDAGBuilder.h [IR][SVE] Add new llvm.experimental.stepvector intrinsic 2021-03-23 10:43:35 +00:00
SelectionDAGDumper.cpp [IR][SVE] Add new llvm.experimental.stepvector intrinsic 2021-03-23 10:43:35 +00:00
SelectionDAGISel.cpp StackProtector: ensure protection does not interfere with tail call frame. 2021-04-13 15:14:57 +01:00
SelectionDAGPrinter.cpp [SelectionDAG] Drop unnecessary const from a return type (NFC) 2021-02-07 09:49:33 -08:00
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [Statepoint Lowering] Allow other than N byte sized types in deopt bundle 2021-04-07 17:48:31 +07:00
StatepointLowering.h More precisely type code used for gc.relocate assertions [nfc] 2021-04-06 11:27:36 -07:00
TargetLowering.cpp [SelectionDAG] Use a VTSDNode to store the saturation width for FP_TO_SINT_SAT/FP_TO_UINT_SAT 2021-04-27 14:38:42 -07:00