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85 lines
3.9 KiB
LLVM
85 lines
3.9 KiB
LLVM
; RUN: llc -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs < %s
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; REQUIRES: asserts
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define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) #0 {
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main_body:
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%tmp = extractelement <4 x float> %reg1, i32 0
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%tmp5 = extractelement <4 x float> %reg1, i32 1
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%tmp6 = extractelement <4 x float> %reg1, i32 2
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%tmp7 = extractelement <4 x float> %reg1, i32 3
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%tmp8 = fcmp ult float %tmp5, 0.000000e+00
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%tmp9 = select i1 %tmp8, float 1.000000e+00, float 0.000000e+00
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%tmp10 = fsub float -0.000000e+00, %tmp9
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%tmp11 = fptosi float %tmp10 to i32
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%tmp12 = bitcast i32 %tmp11 to float
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%tmp13 = fcmp ult float %tmp, 5.700000e+01
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%tmp14 = select i1 %tmp13, float 1.000000e+00, float 0.000000e+00
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%tmp15 = fsub float -0.000000e+00, %tmp14
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%tmp16 = fptosi float %tmp15 to i32
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%tmp17 = bitcast i32 %tmp16 to float
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%tmp18 = bitcast float %tmp12 to i32
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%tmp19 = bitcast float %tmp17 to i32
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%tmp20 = and i32 %tmp18, %tmp19
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%tmp21 = bitcast i32 %tmp20 to float
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%tmp22 = bitcast float %tmp21 to i32
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%tmp23 = icmp ne i32 %tmp22, 0
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%tmp24 = fcmp ult float %tmp, 0.000000e+00
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%tmp25 = select i1 %tmp24, float 1.000000e+00, float 0.000000e+00
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%tmp26 = fsub float -0.000000e+00, %tmp25
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%tmp27 = fptosi float %tmp26 to i32
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%tmp28 = bitcast i32 %tmp27 to float
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%tmp29 = bitcast float %tmp28 to i32
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%tmp30 = icmp ne i32 %tmp29, 0
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br i1 %tmp23, label %IF, label %ELSE
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IF: ; preds = %main_body
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%. = select i1 %tmp30, float 0.000000e+00, float 1.000000e+00
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%.18 = select i1 %tmp30, float 1.000000e+00, float 0.000000e+00
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br label %ENDIF
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ELSE: ; preds = %main_body
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br i1 %tmp30, label %ENDIF, label %ELSE17
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ENDIF: ; preds = %ELSE17, %ELSE, %IF
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%temp1.0 = phi float [ %., %IF ], [ %tmp48, %ELSE17 ], [ 0.000000e+00, %ELSE ]
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%temp2.0 = phi float [ 0.000000e+00, %IF ], [ %tmp49, %ELSE17 ], [ 1.000000e+00, %ELSE ]
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%temp.0 = phi float [ %.18, %IF ], [ %tmp47, %ELSE17 ], [ 0.000000e+00, %ELSE ]
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%max.0.i = call float @llvm.maxnum.f32(float %temp.0, float 0.000000e+00)
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%clamp.i = call float @llvm.minnum.f32(float %max.0.i, float 1.000000e+00)
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%max.0.i3 = call float @llvm.maxnum.f32(float %temp1.0, float 0.000000e+00)
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%clamp.i4 = call float @llvm.minnum.f32(float %max.0.i3, float 1.000000e+00)
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%max.0.i1 = call float @llvm.maxnum.f32(float %temp2.0, float 0.000000e+00)
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%clamp.i2 = call float @llvm.minnum.f32(float %max.0.i1, float 1.000000e+00)
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%tmp31 = insertelement <4 x float> undef, float %clamp.i, i32 0
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%tmp32 = insertelement <4 x float> %tmp31, float %clamp.i4, i32 1
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%tmp33 = insertelement <4 x float> %tmp32, float %clamp.i2, i32 2
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%tmp34 = insertelement <4 x float> %tmp33, float 1.000000e+00, i32 3
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call void @llvm.r600.store.swizzle(<4 x float> %tmp34, i32 0, i32 0)
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ret void
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ELSE17: ; preds = %ELSE
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%tmp35 = fadd float 0.000000e+00, 0x3FC99999A0000000
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%tmp36 = fadd float 0.000000e+00, 0x3FC99999A0000000
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%tmp37 = fadd float 0.000000e+00, 0x3FC99999A0000000
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%tmp38 = fadd float %tmp35, 0x3FC99999A0000000
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%tmp39 = fadd float %tmp36, 0x3FC99999A0000000
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%tmp40 = fadd float %tmp37, 0x3FC99999A0000000
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%tmp41 = fadd float %tmp38, 0x3FC99999A0000000
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%tmp42 = fadd float %tmp39, 0x3FC99999A0000000
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%tmp43 = fadd float %tmp40, 0x3FC99999A0000000
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%tmp44 = fadd float %tmp41, 0x3FC99999A0000000
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%tmp45 = fadd float %tmp42, 0x3FC99999A0000000
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%tmp46 = fadd float %tmp43, 0x3FC99999A0000000
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%tmp47 = fadd float %tmp44, 0x3FC99999A0000000
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%tmp48 = fadd float %tmp45, 0x3FC99999A0000000
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%tmp49 = fadd float %tmp46, 0x3FC99999A0000000
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br label %ENDIF
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}
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declare float @llvm.minnum.f32(float, float) #1
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declare float @llvm.maxnum.f32(float, float) #1
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declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) #0
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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