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It is necessary to generate fixups in .debug_frame or .eh_frame as relaxation is enabled due to the address delta may be changed after relaxation. There is an opcode with 6-bits data in debug frame encoding. So, we also need 6-bits fixup types. Differential Revision: https://reviews.llvm.org/D58335 llvm-svn: 366524
21 lines
775 B
LLVM
21 lines
775 B
LLVM
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - \
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; RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX %s
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; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=-relax %s -o - \
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; RUN: | llvm-readobj -r | FileCheck -check-prefix=NORELAX %s
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; This test checks that a diff inserted via inline assembly only causes
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; relocations when relaxation is enabled. This isn't an assembly test
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; as the assembler takes a different path through LLVM, which is
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; already covered by the fixups-expr.s test.
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define i32 @main() nounwind {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval, align 4
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; RELAX: R_RISCV_ADD64 b
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; RELAX: R_RISCV_SUB64 a
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; NORELAX-NOT: R_RISCV_ADD
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call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
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ret i32 0
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}
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