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Register live ranges may have had gaps that after coalescing should be removed. This is done by adding a new segment to the range, and merging it with neighboring segments. When doing so, do not assume that each subrange of the register ended at the same index. If a subrange ended earlier, adding this segment could make the live range invalid. Instead, if the subrange is not live at the start of the segment, extend it first.
46 lines
1.3 KiB
YAML
46 lines
1.3 KiB
YAML
# RUN: llc -march=hexagon -run-pass simple-register-coalescing -verify-coalescing %s -o - | FileCheck %s
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#
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# Check that this doesn't crash.
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# CHECK: ENDLOOP
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---
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name: foo
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $r0, $r1, $r2, $v0, $v1, $v2, $v3
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%0:hvxwr = COPY $v0
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%1:intregs = COPY $r0
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%2:predregs = C2_cmpgtui %1, 2
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%3:intregs = COPY $r1
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%4:intregs = COPY $r2
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%5:hvxvr = COPY $v1
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%6:hvxwr = V6_vcombine $v1, $v0
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%7:hvxqr = IMPLICIT_DEF
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J2_loop0r %bb.1, %3, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
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J2_jumpf %2, %bb.2, implicit-def $pc
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J2_jump %bb.1, implicit-def $pc
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bb.1:
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successors: %bb.2(0x04000000), %bb.1(0x7c000000)
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%8:hvxwr = COPY %0
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%9:hvxvr = V6_vL32b_ai %4, 0
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%10:hvxvr = V6_vL32b_ai %4, 128
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%5:hvxvr = V6_vaddwq %7, %5, %9
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%11:hvxqr = V6_vgtuw %10, %0.vsub_lo
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%12:hvxvr = V6_vL32b_ai %4, 256
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%13:hvxvr = V6_vL32b_ai %4, 384
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%5:hvxvr = V6_vaddwq %11, %5, %13
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%7:hvxqr = V6_vgtuw %6.vsub_hi, %13
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%0:hvxwr = COPY %8
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%0:hvxwr = V6_vmpyhv_acc %0, %12, %12
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%6:hvxwr = COPY %8
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ENDLOOP0 %bb.1, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
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J2_jump %bb.2, implicit-def $pc
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bb.2:
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...
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