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2826f5b278
with a temporary assertion and adjust the various test cases. llvm-svn: 197224
33 lines
864 B
LLVM
33 lines
864 B
LLVM
; XFAIL: *
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; fixme rev16 pattern is not matching
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; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep "rev16\W*r[0-9]*,\W*r[0-9]*" | count 1
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; 0xff00ff00 = 4278255360
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; 0x00ff00ff = 16711935
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define i32 @f1(i32 %a) {
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%mask_l8 = and i32 %l8, 4278255360
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%mask_r8 = and i32 %r8, 16711935
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%tmp = or i32 %mask_l8, %mask_r8
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ret i32 %tmp
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}
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; 0xff000000 = 4278190080
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; 0x00ff0000 = 16711680
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; 0x0000ff00 = 65280
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; 0x000000ff = 255
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define i32 @f2(i32 %a) {
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%l8 = shl i32 %a, 8
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%r8 = lshr i32 %a, 8
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%masklo_l8 = and i32 %l8, 65280
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%maskhi_l8 = and i32 %l8, 4278190080
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%masklo_r8 = and i32 %r8, 255
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%maskhi_r8 = and i32 %r8, 16711680
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%tmp1 = or i32 %masklo_l8, %masklo_r8
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%tmp2 = or i32 %maskhi_l8, %maskhi_r8
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%tmp = or i32 %tmp1, %tmp2
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ret i32 %tmp
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}
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