Muhammad Asif Manzoor 19dce81307 [AArch64][SVE] Add lowering for rounding operations ... Add the functionality to lower SVE rounding operations for passthru variant. Created a new test case file for all rounding operations. Reviewed By: paulwalker-arm Differential Revision: https://reviews.llvm.org/D86793		2020-09-04 11:16:57 -04:00
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AArch64	[AArch64][SVE] Add lowering for rounding operations	2020-09-04 11:16:57 -04:00
AMDGPU	AMDGPU: Remove code to handle tied si_else operands	2020-09-03 19:46:05 -04:00
ARC
ARM	Revert "[ARM] Register pressure with -mthumb forces register reload before each call"	2020-09-01 07:39:54 +01:00
AVR
BPF
Generic
Hexagon
Inputs
Lanai
Mips
MIR	[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)	2020-09-03 16:13:09 -04:00
MSP430
NVPTX
PowerPC	[EarlyCSE] Verify hash code in regression tests	2020-09-04 10:40:35 -04:00
RISCV
SPARC
SystemZ
Thumb
Thumb2	[ARM] Fold predicate_cast(load) into vldr p0	2020-09-04 11:29:59 +01:00
VE
WebAssembly
WinCFGuard
WinEH
X86	[EarlyCSE] Verify hash code in regression tests	2020-09-04 10:40:35 -04:00
XCore