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llvm-mirror/test/CodeGen/Hexagon/autohvx
Krzysztof Parzyszek 1eb8234c85 [Hexagon] Fix perfect shuffle generation for single vectors
Perfect shuffle instruction (vdealvdd/vshuffvdd) work on vector
pairs. When given a single input vector, half of it first needs
to be transposed into the other vector before the generated
shuffles can take effect. Also the first transpose needs to be
undone at the end (this last step was missing).
2020-08-30 06:43:16 -05:00
..
align2-64b.ll
align2-128b.ll
align-64b.ll
align-128b.ll
arith.ll [Hexagon] Emit better 32-bit multiplication sequence for HVXv62+ 2020-08-27 15:24:32 -05:00
bitcount-64b.ll
bitcount-128b.ll
bitwise-pred-64b.ll
bitwise-pred-128b.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
bswap.ll
build-vector-i32-type.ll
concat-vectors-64b.ll
concat-vectors-128b.ll
contract-64b.ll
contract-128b.ll
ctpop-split.ll
deal-64b.ll
deal-128b.ll
delta2-64b.ll
delta-64b.ll
delta-128b.ll
extract-element.ll
float-cost.ll
interleave.ll
isel-anyext-inreg.ll
isel-anyext-pair.ll
isel-bitcast-vsplat2.ll
isel-bitcast-vsplat.ll
isel-bool-vector.ll
isel-build-undef.ll
isel-concat-multiple.ll
isel-concat-vectors-bool.ll
isel-concat-vectors.ll
isel-const-splat-bitcast.ll
isel-const-splat.ll
isel-const-vector.ll
isel-expand-unaligned-loads-noindexed.ll
isel-expand-unaligned-loads.ll
isel-extractelt-illegal-type.ll
isel-hvx-pred-bitcast.ll Reland 7691790dfd1011d08f5468f63952d7690755aad4 with a MSAN fix 2020-02-28 08:32:58 -06:00
isel-q2v-pair.ll
isel-qfalse.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
isel-select-const.ll
isel-setcc-pair.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
isel-setcc-v256i1.ll
isel-sext-inreg.ll
isel-shift-byte.ll
isel-shuff-single.ll [Hexagon] Fix perfect shuffle generation for single vectors 2020-08-30 06:43:16 -05:00
isel-shuffle-gather.ll
isel-shuffle-pack.ll
isel-store-bitcast-v128i1.ll Reland 7691790dfd1011d08f5468f63952d7690755aad4 with a MSAN fix 2020-02-28 08:32:58 -06:00
isel-truncate.ll
isel-vec-ext.ll
isel-vsplat-pair.ll
lower-insert-elt.ll
masked-vmem-basic.ll [Hexagon] Implement llvm.masked.load and llvm.masked.store for HVX 2020-08-26 13:10:22 -05:00
maximize-bandwidth.ll
minmax-64b.ll
minmax-128b.ll
perfect-single.ll
reg-sequence.ll
shift-64b.ll
shift-128b.ll
short-store-widen.ll [Hexagon] Widen short vector stores to HVX vectors using masked stores 2020-08-27 09:25:08 -05:00
shuff-64b.ll
shuff-128b.ll
shuff-combos-64b.ll
shuff-combos-128b.ll
shuff-single.ll
vdd0.ll
vector-compare-64b.ll
vector-compare-128b.ll
vector-predicate-typecast.ll [Hexagon] Introduce noop intrinsic to cast between vector predicate types 2020-02-21 07:37:59 -06:00
vext-64b.ll
vext-128b.ll
vmux-order.ll