1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen/Hexagon/plt-rel.ll
Sumanth Gundapaneni 262321d1ff [Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"

For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"

Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.

Differential Revision: https://reviews.llvm.org/D38851

llvm-svn: 316101
2017-10-18 18:07:07 +00:00

38 lines
1.3 KiB
LLVM

; RUN: llc -march=hexagon -relocation-model=pic -mattr=+long-calls < %s | FileCheck --check-prefix=CHECK-LONG %s
; RUN: llc -march=hexagon -relocation-model=pic < %s | FileCheck %s
; CHECK-LONG: call ##_ZL13g_usr1_called@GDPLT
; CHECK-LONG-NOT: call _ZL13g_usr1_called@GDPLT
; CHECK: call _ZL13g_usr1_called@GDPLT
; CHECK-NOT: call ##_ZL13g_usr1_called@GDPLT
target triple = "hexagon"
@_ZL13g_usr1_called = internal thread_local global i32 0, align 4
; Function Attrs: norecurse nounwind
define void @_Z14SigUsr1Handleri(i32) local_unnamed_addr #0 {
entry:
store volatile i32 1, i32* @_ZL13g_usr1_called, align 4
ret void
}
; Function Attrs: norecurse nounwind
define zeroext i1 @_Z27CheckForMonitorCancellationv() local_unnamed_addr #0 {
entry:
%0 = load volatile i32, i32* @_ZL13g_usr1_called, align 4
%tobool = icmp eq i32 %0, 0
br i1 %tobool, label %return, label %if.then
if.then: ; preds = %entry
store volatile i32 0, i32* @_ZL13g_usr1_called, align 4
br label %return
return: ; preds = %entry, %if.then
%.sink = phi i1 [ true, %if.then ], [ false, %entry ]
ret i1 %.sink
}
attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }