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568017d4d5
This patch fixes the miscompile that happens when PRE hoists loads across guards and other instructions that don't always pass control flow to their successors. PRE is now prohibited to hoist across such instructions because there is no guarantee that the load standing after such instruction is still valid before such instruction. For example, a load from under a guard may be invalid before the guard in the following case: int array[LEN]; ... guard(0 <= index && index < LEN); use(array[index]); Differential Revision: https://reviews.llvm.org/D37460 llvm-svn: 316975
40 lines
1.3 KiB
LLVM
40 lines
1.3 KiB
LLVM
; RUN: opt -S -gvn -enable-load-pre < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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%ArrayImpl = type { i64, i64 addrspace(100)*, [1 x i64], [1 x i64], [1 x i64], i64, i64, double addrspace(100)*, double addrspace(100)*, i8, i64 }
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; Function Attrs: readnone
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declare %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)*) #0
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; Function Attrs: readnone
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declare i64* @getaddr_i64(i64 addrspace(100)*) #0
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; Make sure that the test compiles without a crash.
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; Bug https://bugs.llvm.org/show_bug.cgi?id=34937
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define hidden void @wrapon_fn173() {
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; CHECK-LABEL: @wrapon_fn173
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; CHECK: entry:
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; CHECK-NEXT: call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
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; CHECK-NEXT: %.pre = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
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; CHECK-NEXT: br label %loop
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; CHECK: loop:
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; CHECK-NEXT: call i64* @getaddr_i64(i64 addrspace(100)* %.pre)
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; CHECK-NEXT: br label %loop
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entry:
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%0 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
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br label %loop
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loop:
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%1 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
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%2 = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
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%3 = call i64* @getaddr_i64(i64 addrspace(100)* %2)
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br label %loop
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}
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attributes #0 = { readnone }
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