1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
llvm-mirror/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
Max Kazantsev 568017d4d5 Reapply "[GVN] Prevent LoadPRE from hoisting across instructions that don't pass control flow to successors"
This patch fixes the miscompile that happens when PRE hoists loads across guards and
other instructions that don't always pass control flow to their successors. PRE is now prohibited
to hoist across such instructions because there is no guarantee that the load standing after such
instruction is still valid before such instruction. For example, a load from under a guard may be
invalid before the guard in the following case:
  int array[LEN];
  ...
  guard(0 <= index && index < LEN);
  use(array[index]);

Differential Revision: https://reviews.llvm.org/D37460

llvm-svn: 316975
2017-10-31 05:07:56 +00:00

40 lines
1.3 KiB
LLVM

; RUN: opt -S -gvn -enable-load-pre < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%ArrayImpl = type { i64, i64 addrspace(100)*, [1 x i64], [1 x i64], [1 x i64], i64, i64, double addrspace(100)*, double addrspace(100)*, i8, i64 }
; Function Attrs: readnone
declare %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)*) #0
; Function Attrs: readnone
declare i64* @getaddr_i64(i64 addrspace(100)*) #0
; Make sure that the test compiles without a crash.
; Bug https://bugs.llvm.org/show_bug.cgi?id=34937
define hidden void @wrapon_fn173() {
; CHECK-LABEL: @wrapon_fn173
; CHECK: entry:
; CHECK-NEXT: call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
; CHECK-NEXT: %.pre = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
; CHECK-NEXT: br label %loop
; CHECK: loop:
; CHECK-NEXT: call i64* @getaddr_i64(i64 addrspace(100)* %.pre)
; CHECK-NEXT: br label %loop
entry:
%0 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
br label %loop
loop:
%1 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
%2 = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
%3 = call i64* @getaddr_i64(i64 addrspace(100)* %2)
br label %loop
}
attributes #0 = { readnone }