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llvm-mirror/lib/CodeGen
Chris Lattner dbdc830c83 Add a little dag combine to compile this:
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
        %tmp1 = load <4 x float>* %in           ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 )           ; <int> [#uses=1]
        %tmp = seteq int %tmp, 0                ; <bool> [#uses=1]
        %tmp3 = cast bool %tmp to int           ; <int> [#uses=1]
        ret int %tmp3
}

into this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        mtspr 256, r2
        blr

instead of this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr

llvm-svn: 27356
2006-04-02 06:11:11 +00:00
..
SelectionDAG Add a little dag combine to compile this: 2006-04-02 06:11:11 +00:00
AsmPrinter.cpp Use "llvm.metadata" section for debug globals. Filter out these globals in the 2006-03-07 22:00:35 +00:00
BranchFolding.cpp Remove trailing whitespace 2005-04-21 22:36:52 +00:00
DwarfWriter.cpp Refactor address attributes. Add base register to frame info. 2006-03-28 14:58:32 +00:00
ELFWriter.cpp add these so I can be less naughty 2005-12-28 06:29:02 +00:00
IntrinsicLowering.cpp Handle new forms of llvm.dbg intrinsics. 2006-03-23 18:06:46 +00:00
LiveInterval.cpp Fix LiveInterval::getOverlapingRanges to take things in the right order 2005-10-21 06:41:30 +00:00
LiveIntervalAnalysis.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
LiveVariables.cpp Add a LiveVariables::VarInfo::dump method 2006-01-04 05:40:30 +00:00
MachineBasicBlock.cpp Remove trailing whitespace 2005-04-21 22:36:52 +00:00
MachineCodeEmitter.cpp mixed-STL programs are big and nasty :( 2005-12-28 02:44:35 +00:00
MachineDebugInfo.cpp More bulletproofing of DebugInfoDesc verify. 2006-03-28 01:30:18 +00:00
MachineFunction.cpp Adjust to MachineConstantPool interface change: instead of keeping a 2006-02-09 04:46:04 +00:00
MachineInstr.cpp Remove trailing whitespace 2005-04-21 22:36:52 +00:00
Makefile Change Library Names Not To Conflict With Others When Installed 2004-10-27 23:18:45 +00:00
Passes.cpp Alkis agrees that that iterative scan allocator isn't going to be worked on 2005-10-24 04:14:30 +00:00
PHIElimination.cpp Add support for targets (like Alpha) that have terminator instructions which 2006-01-04 07:12:21 +00:00
PhysRegTracker.h Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr 2004-02-23 06:10:13 +00:00
PrologEpilogInserter.cpp Always compute max align. 2005-11-06 17:43:20 +00:00
RegAllocLinearScan.cpp Add some comments. 2006-03-25 23:00:56 +00:00
RegAllocLocal.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
RegAllocSimple.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
TwoAddressInstructionPass.cpp Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
UnreachableBlockElim.cpp Remove trailing whitespace 2005-04-21 22:36:52 +00:00
ValueTypes.cpp Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 2006-02-20 22:34:53 +00:00
VirtRegMap.cpp Fix a bug that Evan exposed with some changes he's making, and that was 2006-02-25 02:17:31 +00:00
VirtRegMap.h Remove trailing whitespace 2005-04-21 22:36:52 +00:00