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4a1ffa80e1
Also improve assembler parser register validation for .seh_ directives. This requires moving X86-specific seh directive handling into the x86 backend, which addresses some assembler FIXMEs. Differential Revision: https://reviews.llvm.org/D66625 llvm-svn: 370533
160 lines
5.2 KiB
ArmAsm
160 lines
5.2 KiB
ArmAsm
// This test checks that the SEH directives emit the correct unwind data.
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// RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | llvm-readobj -S -u -r | FileCheck %s
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// CHECK: Sections [
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// CHECK: Section {
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// CHECK: Name: .text
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// CHECK: RelocationCount: 0
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// CHECK: Characteristics [
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// CHECK-NEXT: ALIGN_4BYTES
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// CHECK-NEXT: CNT_CODE
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// CHECK-NEXT: MEM_EXECUTE
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// CHECK-NEXT: MEM_READ
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK: Section {
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// CHECK: Name: .xdata
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// CHECK: RawDataSize: 52
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// CHECK: RelocationCount: 4
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// CHECK: Characteristics [
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// CHECK-NEXT: ALIGN_4BYTES
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// CHECK-NEXT: CNT_INITIALIZED_DATA
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// CHECK-NEXT: MEM_READ
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK: Section {
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// CHECK: Name: .pdata
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// CHECK: RelocationCount: 9
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// CHECK: Characteristics [
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// CHECK-NEXT: ALIGN_4BYTES
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// CHECK-NEXT: CNT_INITIALIZED_DATA
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// CHECK-NEXT: MEM_READ
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK-NEXT: Relocations [
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// CHECK-NEXT: Section (4) .xdata {
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// CHECK-NEXT: 0x14 IMAGE_REL_AMD64_ADDR32NB __C_specific_handler
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// CHECK-NEXT: 0x20 IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x24 IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x28 IMAGE_REL_AMD64_ADDR32NB .xdata
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// CHECK-NEXT: }
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// CHECK-NEXT: Section (5) .pdata {
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// CHECK-NEXT: 0x0 IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x4 IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x8 IMAGE_REL_AMD64_ADDR32NB .xdata
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// CHECK-NEXT: 0xC IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x10 IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: 0x14 IMAGE_REL_AMD64_ADDR32NB .xdata
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// CHECK-NEXT: 0x18 IMAGE_REL_AMD64_ADDR32NB smallFunc
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// CHECK-NEXT: 0x1C IMAGE_REL_AMD64_ADDR32NB smallFunc
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// CHECK-NEXT: 0x20 IMAGE_REL_AMD64_ADDR32NB .xdata
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK: UnwindInformation [
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: StartAddress: [[CodeSect1:[^ ]+]] [[BeginDisp1:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: EndAddress: [[CodeSect1]] [[EndDisp1:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: UnwindInfoAddress:
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// CHECK-NEXT: UnwindInfo {
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// CHECK-NEXT: Version: 1
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: ExceptionHandler
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// CHECK-NEXT: ]
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// CHECK-NEXT: PrologSize: 18
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// CHECK-NEXT: FrameRegister: RBX
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// CHECK-NEXT: FrameOffset: 0x0
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// CHECK-NEXT: UnwindCodeCount: 8
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// CHECK-NEXT: UnwindCodes [
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// CHECK-NEXT: 0x12: SET_FPREG reg=RBX, offset=0x0
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// CHECK-NEXT: 0x0F: PUSH_NONVOL reg=RBX
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// CHECK-NEXT: 0x0E: SAVE_XMM128 reg=XMM8, offset=0x0
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// CHECK-NEXT: 0x09: SAVE_NONVOL reg=RSI, offset=0x10
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// CHECK-NEXT: 0x04: ALLOC_SMALL size=24
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// CHECK-NEXT: 0x00: PUSH_MACHFRAME errcode=yes
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// CHECK-NEXT: ]
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// CHECK-NEXT: Handler: __C_specific_handler
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: StartAddress: [[CodeSect2:[^ ]+]] [[BeginDisp2:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: EndAddress: [[CodeSect2]] [[BeginDisp2:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: UnwindInfoAddress:
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// CHECK-NEXT: UnwindInfo {
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// CHECK-NEXT: Version: 1
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: ChainInfo
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// CHECK-NEXT: ]
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// CHECK-NEXT: PrologSize: 0
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// CHECK-NEXT: FrameRegister: -
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// CHECK-NEXT: FrameOffset: -
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// CHECK-NEXT: UnwindCodeCount: 0
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// CHECK-NEXT: UnwindCodes [
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// CHECK-NEXT: ]
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// CHECK-NEXT: Chained {
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// CHECK-NEXT: StartAddress: [[CodeSect1]] [[BeginDisp1]]
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// CHECK-NEXT: EndAddress: [[CodeSect1]] [[EndDisp1]]
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// CHECK-NEXT: UnwindInfoAddress:
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: StartAddress: [[CodeSect3:[^ ]+]] [[BeginDisp3:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: EndAddress: [[CodeSect3]] [[BeginDisp3:(\+0x[A-F0-9]+)?]]
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// CHECK-NEXT: UnwindInfoAddress:
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// CHECK-NEXT: UnwindInfo {
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// CHECK-NEXT: Version: 1
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: ]
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// CHECK-NEXT: PrologSize: 0
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// CHECK-NEXT: FrameRegister: -
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// CHECK-NEXT: FrameOffset: -
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// CHECK-NEXT: UnwindCodeCount: 0
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// CHECK-NEXT: UnwindCodes [
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// CHECK-NEXT: ]
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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.text
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.globl func
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.def func; .scl 2; .type 32; .endef
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.seh_proc func
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func:
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.seh_pushframe @code
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subq $24, %rsp
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.seh_stackalloc 24
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movq %rsi, 16(%rsp)
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.seh_savereg %rsi, 16
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movups %xmm8, (%rsp)
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.seh_savexmm %xmm8, 0
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pushq %rbx
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.seh_pushreg %rbx
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mov %rsp, %rbx
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.seh_setframe 3, 0
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.seh_endprologue
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.seh_handler __C_specific_handler, @except
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.seh_handlerdata
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.long 0
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.text
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.seh_startchained
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.seh_endprologue
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.seh_endchained
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lea (%rbx), %rsp
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pop %rbx
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addq $24, %rsp
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ret
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.seh_endproc
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// Test emission of small functions.
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.globl smallFunc
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.def smallFunc; .scl 2; .type 32; .endef
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.seh_proc smallFunc
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smallFunc:
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ret
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.seh_endproc
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