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llvm-mirror/test/CodeGen/Mips/llvm-ir
Dan Gohman 3ee3e60f77 Use TargetRegisterInfo for printing MachineOperand register comments
Several places in AsmPrinter.cpp print comments describing MachineOperand
registers using MCRegisterInfo, which uses MCOperand-oriented names. This
doesn't work for targets that use virtual registers exclusively, as
WebAssembly does, since virtual registers are represented and printed
differently.

This patch preserves what seems to be the spirit of r229978, avoiding the
use of TM.getSubtargetImpl(), while still using MachineOperand-oriented
printing for MachineOperands.

Differential Revision: http://reviews.llvm.org/D14709

llvm-svn: 253338
2015-11-17 16:01:28 +00:00
..
add.ll
addrspacecast.ll
and.ll
ashr.ll
atomicrmx.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
call.ll Use TargetRegisterInfo for printing MachineOperand register comments 2015-11-17 16:01:28 +00:00
extractelement.ll Fix vector splitting for extract_vector_elt and vector elements of <8-bits. 2015-09-09 09:53:20 +00:00
indirectbr.ll
load-atomic.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
lshr.ll
mul.ll
or.ll
ret.ll
sdiv.ll
select.ll
shl.ll
sqrt.ll [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend 2015-10-06 15:17:25 +00:00
srem.ll
store-atomic.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
sub.ll
udiv.ll
urem.ll
xor.ll