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155 lines
6.4 KiB
ArmAsm
155 lines
6.4 KiB
ArmAsm
@ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s | FileCheck %s
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.syntax unified
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.globl _func
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@ Check that the assembler can handle the documented syntax from the ARM ARM.
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@ For complex constructs like shifter operands, check more thoroughly for them
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@ once then spot check that following instructions accept the form generally.
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@ This gives us good coverage while keeping the overall size of the test
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@ more reasonable.
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@ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
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_func:
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@ CHECK: _func
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@------------------------------------------------------------------------------
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@ ADC (immediate)
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@------------------------------------------------------------------------------
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adc r0, r1, #4
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adcs r0, r1, #0
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adc r1, r2, #255
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adc r3, r7, #0x00550055
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adc r8, r12, #0xaa00aa00
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adc r9, r7, #0xa5a5a5a5
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adc r5, r3, #0x87000000
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adc r4, r2, #0x7f800000
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adc r4, r2, #0x00000680
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@ CHECK: adc r0, r1, #4 @ encoding: [0x41,0xf1,0x04,0x00]
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@ CHECK: adcs r0, r1, #0 @ encoding: [0x51,0xf1,0x00,0x00]
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@ CHECK: adc r1, r2, #255 @ encoding: [0x42,0xf1,0xff,0x01]
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@ CHECK: adc r3, r7, #5570645 @ encoding: [0x47,0xf1,0x55,0x13]
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@ CHECK: adc r8, r12, #2852170240 @ encoding: [0x4c,0xf1,0xaa,0x28]
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@ CHECK: adc r9, r7, #2779096485 @ encoding: [0x47,0xf1,0xa5,0x39]
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@ CHECK: adc r5, r3, #2264924160 @ encoding: [0x43,0xf1,0x07,0x45]
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@ CHECK: adc r4, r2, #2139095040 @ encoding: [0x42,0xf1,0xff,0x44]
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@ CHECK: adc r4, r2, #1664 @ encoding: [0x42,0xf5,0xd0,0x64]
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@------------------------------------------------------------------------------
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@ ADC (register)
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@------------------------------------------------------------------------------
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adc r4, r5, r6
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adcs r4, r5, r6
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adc.w r9, r1, r3
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adcs.w r9, r1, r3
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adc r0, r1, r3, ror #4
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adcs r0, r1, r3, lsl #7
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adc.w r0, r1, r3, lsr #31
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adcs.w r0, r1, r3, asr #32
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@ CHECK: adc.w r4, r5, r6 @ encoding: [0x45,0xeb,0x06,0x04]
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@ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04]
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@ CHECK: adc.w r9, r1, r3 @ encoding: [0x41,0xeb,0x03,0x09]
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@ CHECK: adcs.w r9, r1, r3 @ encoding: [0x51,0xeb,0x03,0x09]
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@ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10]
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@ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10]
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@ CHECK: adc.w r0, r1, r3, lsr #31 @ encoding: [0x41,0xeb,0xd3,0x70]
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@ CHECK: adcs.w r0, r1, r3, asr #32 @ encoding: [0x51,0xeb,0x23,0x00]
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@------------------------------------------------------------------------------
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@ ADD (immediate)
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@------------------------------------------------------------------------------
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itet eq
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addeq r1, r2, #4
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addwne r5, r3, #1023
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addeq r4, r5, #293
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add r2, sp, #1024
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add r2, r8, #0xff00
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add r2, r3, #257
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addw r2, r3, #257
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add r12, r6, #0x100
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addw r12, r6, #0x100
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adds r1, r2, #0x1f0
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@ CHECK: itet eq @ encoding: [0x0a,0xbf]
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@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
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@ CHECK: addwne r5, r3, #1023 @ encoding: [0x03,0xf2,0xff,0x35]
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@ CHECK: addweq r4, r5, #293 @ encoding: [0x05,0xf2,0x25,0x14]
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@ CHECK: add.w r2, sp, #1024 @ encoding: [0x0d,0xf5,0x80,0x62]
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@ CHECK: add.w r2, r8, #65280 @ encoding: [0x08,0xf5,0x7f,0x42]
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@ CHECK: addw r2, r3, #257 @ encoding: [0x03,0xf2,0x01,0x12]
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@ CHECK: addw r2, r3, #257 @ encoding: [0x03,0xf2,0x01,0x12]
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@ CHECK: add.w r12, r6, #256 @ encoding: [0x06,0xf5,0x80,0x7c]
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@ CHECK: addw r12, r6, #256 @ encoding: [0x06,0xf2,0x00,0x1c]
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@ CHECK: adds.w r1, r2, #496 @ encoding: [0x12,0xf5,0xf8,0x71]
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@------------------------------------------------------------------------------
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@ ADD (register)
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@------------------------------------------------------------------------------
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add r1, r2, r8
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add r5, r9, r2, asr #32
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adds r7, r3, r1, lsl #31
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adds.w r0, r3, r6, lsr #25
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add.w r4, r8, r1, ror #12
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@ CHECK: add.w r1, r2, r8 @ encoding: [0x02,0xeb,0x08,0x01]
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@ CHECK: add.w r5, r9, r2, asr #32 @ encoding: [0x09,0xeb,0x22,0x05]
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@ CHECK: adds.w r7, r3, r1, lsl #31 @ encoding: [0x13,0xeb,0xc1,0x77]
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@ CHECK: adds.w r0, r3, r6, lsr #25 @ encoding: [0x13,0xeb,0x56,0x60]
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@ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
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@------------------------------------------------------------------------------
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@ FIXME: ADR
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@------------------------------------------------------------------------------
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@------------------------------------------------------------------------------
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@ AND (immediate)
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@------------------------------------------------------------------------------
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and r2, r5, #0xff000
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ands r3, r12, #0xf
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and r1, #0xff
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and r1, r1, #0xff
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@ CHECK: and r2, r5, #1044480 @ encoding: [0x05,0xf4,0x7f,0x22]
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@ CHECK: ands r3, r12, #15 @ encoding: [0x1c,0xf0,0x0f,0x03]
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@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
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@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
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@------------------------------------------------------------------------------
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@ B
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@------------------------------------------------------------------------------
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bmi.w #-183396
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@ CHECK: bmi.w #-183396 @ encoding: [0x13,0xf5,0xce,0xa9]
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@------------------------------------------------------------------------------
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@ CBZ/CBNZ
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@------------------------------------------------------------------------------
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cbnz r7, #6
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cbnz r7, #12
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@ CHECK: cbnz r7, #6 @ encoding: [0x1f,0xb9]
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@ CHECK: cbnz r7, #12 @ encoding: [0x37,0xb9]
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@------------------------------------------------------------------------------
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@ IT
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@------------------------------------------------------------------------------
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@ Test encodings of a few full IT blocks, not just the IT instruction
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iteet eq
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addeq r0, r1, r2
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nopne
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subne r5, r6, r7
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addeq r1, r2, #4
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@ CHECK: iteet eq @ encoding: [0x0d,0xbf]
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@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18]
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@ CHECK: nopne @ encoding: [0x00,0xbf]
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@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
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@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
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