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5dfc642fbd
Try to avoid mutually exclusive features. Don't use a real default GPU, and use a fake "generic". The goal is to make it easier to see which set of features are incompatible between feature strings. Most of the test changes are due to random scheduling changes from not having a default fullspeed model. llvm-svn: 310258
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}s_mulk_i32_k0:
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; SI: s_load_dword [[VAL:s[0-9]+]]
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; SI: s_mulk_i32 [[VAL]], 0x41
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; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[VAL]]
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; SI: buffer_store_dword [[VRESULT]]
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; SI: s_endpgm
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define amdgpu_kernel void @s_mulk_i32_k0(i32 addrspace(1)* %out, i32 %b) {
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%mul = mul i32 %b, 65
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store i32 %mul, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_mulk_i32_k1:
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; SI: s_mulk_i32 {{s[0-9]+}}, 0x7fff{{$}}
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; SI: s_endpgm
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define amdgpu_kernel void @s_mulk_i32_k1(i32 addrspace(1)* %out, i32 %b) {
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%mul = mul i32 %b, 32767 ; (1 << 15) - 1
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store i32 %mul, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_mulk_i32_k2:
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; SI: s_mulk_i32 {{s[0-9]+}}, 0xffef{{$}}
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; SI: s_endpgm
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define amdgpu_kernel void @s_mulk_i32_k2(i32 addrspace(1)* %out, i32 %b) {
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%mul = mul i32 %b, -17
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store i32 %mul, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}no_s_mulk_i32_k0:
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; SI: s_mul_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x8001{{$}}
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; SI: s_endpgm
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define amdgpu_kernel void @no_s_mulk_i32_k0(i32 addrspace(1)* %out, i32 %b) {
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%mul = mul i32 %b, 32769 ; 1 << 15 + 1
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store i32 %mul, i32 addrspace(1)* %out
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ret void
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}
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@lds = addrspace(3) global [512 x i32] undef, align 4
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; SI-LABEL: {{^}}commute_s_mulk_i32:
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; SI: s_mulk_i32 s{{[0-9]+}}, 0x800{{$}}
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define amdgpu_kernel void @commute_s_mulk_i32(i32 addrspace(1)* %out, i32 %b) #0 {
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%add = mul i32 %size, %b
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call void asm sideeffect "; foo $0, $1", "v,s"([512 x i32] addrspace(3)* @lds, i32 %add)
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ret void
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}
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declare i32 @llvm.amdgcn.groupstaticsize() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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