1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/TableGen
Yuanfang Chen dd53274771 Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
This reverts commit 80a34ae31125aa46dcad47162ba45b152aed968d with fixes.

Previously, since bots turning on EXPENSIVE_CHECKS are essentially turning on
MachineVerifierPass by default on X86 and the fact that
inline-asm-avx-v-constraint-32bit.ll and inline-asm-avx512vl-v-constraint-32bit.ll
are not expected to generate functioning machine code, this would go
down to `report_fatal_error` in MachineVerifierPass. Here passing
`-verify-machineinstrs=0` to make the intent explicit.
2020-02-13 10:16:06 -08:00
..
Common [TBLGEN] Fix subreg value overflow in DAGISelMatcher 2020-02-12 13:29:57 -08:00
FixedLenDecoderEmitter [TableGen] Correct the shift to the proper bit width. 2019-08-10 16:15:06 +00:00
GICombinerEmitter [gicombiner] Correct 64f1bb5cd2c to account for MSVC's %p format 2020-01-07 12:50:05 -08:00
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
address-space-patfrags.td [GlobalISel] Check LLT size matches memory size for non-truncating stores. 2019-08-02 23:33:13 +00:00
AllowDuplicateRegisterNames.td
ambiguous-composition.td
AnonDefinitionOnDemand.td
arithmetic.td
AsmPredicateCondsEmission.td
AsmVariant.td
BigEncoder.td Fix compile-time regression caused by rL371928 2019-09-18 18:14:42 +00:00
BitOffsetDecoder.td
BitsInit.td [TableGen] Fix spurious type error in bit assignment. 2020-02-07 15:11:42 +00:00
BitsInitOverflow.td
cast-list-initializer.td
cast-multiclass.td
cast-typeerror.td
cast.td
ClassInstanceValue.td
code.td
compare.td
ConcatenatedSubregs.td
cond-bitlist.td
cond-default.td
cond-empty-list-arg.td
cond-inheritance.td
cond-let.td
cond-list.td
cond-subclass.td
cond-type.td
cond-usage.td
condsbit.td
ConstraintChecking1.td
ConstraintChecking2.td
ConstraintChecking3.td
ConstraintChecking4.td
ConstraintChecking5.td
ConstraintChecking6.td
ConstraintChecking7.td
ConstraintChecking.inc
CStyleComment.td
dag-functional.td
dag-isel-res-order.td
dag-isel-subregs.td [TBLGEN] Fix subreg value overflow in DAGISelMatcher 2020-02-12 13:29:57 -08:00
Dag.td
DAGDefaultOps.td [TableGen] Allow DAG isel patterns to override default operands. 2019-07-04 08:43:20 +00:00
DefaultOpsGlobalISel.td TableGen/GlobalISel: Handle default operands that are used 2020-01-06 18:26:42 -05:00
defmclass.td
DefmInherit.td
DefmInsideMultiClass.td
defset-typeerror.td
defset.td
defvar.td [TableGen] Introduce an if/then/else statement. 2020-01-14 10:19:53 +00:00
duplicate-include.inc Tablegen: Remove the error for duplicate include files. 2019-11-20 18:24:10 -08:00
duplicate-include.td Tablegen: Remove the error for duplicate include files. 2019-11-20 18:24:10 -08:00
DuplicateFieldValues.td
eq.td
eqbit.td
FastISelEmitter.td
field-access-initializers.td [llvm][TableGen] Define FieldInit::isConcrete overload 2020-02-10 18:04:58 -08:00
FieldAccess.td
foldl.td
foreach-eval.td
foreach-leak.td
foreach-multiclass.td
foreach-range-parse-errors0.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-range-parse-errors1.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-range-parse-errors2.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-range-parse-errors3.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-range-parse-errors4.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-range-parse-errors5.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach-variable-range.td TableGen: Handle nontrivial foreach range bounds 2019-05-22 21:28:20 +00:00
foreach.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
generic-tables-instruction.td Update tablegen test after r369847. 2019-08-24 15:11:41 +00:00
generic-tables.td Update tablegen test after r369847. 2019-08-24 15:11:41 +00:00
get-operand-type.td [TableGen] Emit OperandType enums for RegisterOperands/RegisterClasses 2019-09-23 18:51:00 +00:00
getsetop.td [TableGen] Add bang-operators !getop and !setop. 2019-12-11 12:05:22 +00:00
gisel-physreg-input.td GlobalISel: Support physical register inputs in patterns 2019-09-06 20:32:37 +00:00
GlobalISelEmitter-immarg-literal-pattern.td TableGen/GlobalISel: Fix pattern matching of immarg literals 2020-01-09 17:37:52 -05:00
GlobalISelEmitter-input-discard.td TableGen/GlobalISel: Don't check exact intrinsic opcode value 2020-01-17 20:09:53 -05:00
GlobalISelEmitter-PR39045.td [GlobalISel][NFC] Factor out common target code from GlobalISelEmitterTests 2019-08-13 22:14:37 +00:00
GlobalISelEmitter-SDNodeXForm-timm.td TableGen/GlobalISel: Add way for SDNodeXForm to work on timm 2020-01-09 17:37:52 -05:00
GlobalISelEmitter-setcc.td GlobalISel/TableGen: Handle setcc patterns 2019-08-29 01:13:41 +00:00
GlobalISelEmitter.td TableGen/GlobalISel: Add way for SDNodeXForm to work on timm 2020-01-09 17:37:52 -05:00
GlobalISelEmitterOverloadedPtr.td Teach GlobalISelEmitter to treat used iPTRAny operands as pointer operands 2019-08-20 22:04:10 +00:00
GlobalISelEmitterRegSequence.td GlobalISel/TableGen: Handle REG_SEQUENCE patterns 2019-09-10 17:57:33 +00:00
GlobalISelEmitterSkippedPatterns.td [GlobalISel][NFC] Factor out common target code from GlobalISelEmitterTests 2019-08-13 22:14:37 +00:00
GlobalISelEmitterSubreg.td TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG 2020-01-24 12:15:10 -08:00
GlobalISelEmitterVariadic.td [GlobalISel] Match table opt: fix a bug in matching num of operands 2019-11-01 01:57:48 -07:00
HwModeEncodeDecode.td [TableGen] Fix crash when using HwModes in CodeEmitterGen 2019-10-09 09:15:34 +00:00
HwModeSelect.td Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit""" 2020-02-13 10:16:06 -08:00
if-empty-list-arg.td
if-type.td
if.td
ifbit.td
ifstmt.td [TableGen] Introduce an if/then/else statement. 2020-01-14 10:19:53 +00:00
immarg.td Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics" 2019-09-19 16:26:14 +00:00
Include.inc
Include.td
IntBitInit.td
intrin-side-effects.td [TableGen] Do not set ReadNone attribute on intrinsics with side effects 2019-07-17 10:53:13 +00:00
intrinsic-long-name.td [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
intrinsic-pointer-to-any.td Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty> 2019-06-26 00:08:22 +00:00
intrinsic-struct.td [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
intrinsic-varargs.td [TableGen] Include ValueTypes.td directly into the intrinsic-varargs.td test. 2019-08-21 19:14:38 +00:00
IntSpecialValues.td [TableGen] Allow 2^63-1 and 2^63-2 as int literals. 2019-03-12 09:28:19 +00:00
InvalidMCSchedClassDesc.td [TableGen] Fix a bug that MCSchedClassDesc is interfered between different SchedModel 2019-10-11 08:36:54 +00:00
isa.td
JSON-check.py
JSON.td
LazyChange.td
LetInsideMultiClasses.td
lisp.td
list-element-bitref.td
ListArgs.td [TableGen] Let list elements have a trailing comma 2019-03-26 11:16:01 +00:00
ListArgsSimple.td
listconcat.td
ListConversion.td
ListManip.td
ListOfList.td
listpaste.td
ListSlices.td
listsplat.td [TableGen] Introduce !listsplat 'binary' operator 2019-04-10 18:26:36 +00:00
lit.local.cfg Attempt to fix issue with unresolved lit test in TableGen 2019-08-13 22:32:26 +00:00
LoLoL.td
math.td
MultiClass-def-fail.td [TableGen] Give meaningful msg for def use in multiclass 2019-03-26 10:49:09 +00:00
MultiClass-defm-fail.td
MultiClass-defm.td
MultiClass.td
MultiClassDefName.td
MultiClassInherit.td
MultiPat.td
name-resolution-consistency.td
nested-comment.td
NestedForeach.td
Paste.td
pr8330.td
predicate-patfags.td TableGen: Fix assert on PatFrags with predicate code 2019-12-30 14:24:25 -05:00
prep-diag1.td
prep-diag2.td
prep-diag3.td
prep-diag4.td
prep-diag5.td TableGen: support #ifndef in addition to #ifdef. 2019-05-14 13:04:25 +00:00
prep-diag6.td
prep-diag7.td
prep-diag8.td
prep-diag9.td
prep-diag10.td
prep-diag11-include.inc
prep-diag11.td
prep-diag12-include.inc
prep-diag12.td
prep-diag13.td
prep-diag14.td
prep-ifndef-diag-1.td TableGen: support #ifndef in addition to #ifdef. 2019-05-14 13:04:25 +00:00
prep-ifndef-diag-2.td TableGen: support #ifndef in addition to #ifdef. 2019-05-14 13:04:25 +00:00
prep-ifndef.td TableGen: support #ifndef in addition to #ifdef. 2019-05-14 13:04:25 +00:00
prep-region-include.inc
prep-region-processing.td
RegisterBankEmitter.td
RegisterEncoder.td [CodeEmitter] Support instruction widths > 64 bits 2019-09-15 08:35:08 +00:00
RelTest.td
SchedModelError.td [TableGen] Include schedule model name in diagnostic. 2019-04-15 10:06:26 +00:00
searchabletables-intrinsic.td
self-reference-recursion.td
self-reference-typeerror.td
self-reference.td
SetTheory.td
SiblingForeach.td
size.td
Slice.td
strconcat.td
String.td
subst2.td
subst.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
template-arg-dependency.td
TemplateArgRename.td
Tree.td
TreeNames.td
trydecode-emission2.td
trydecode-emission3.td
trydecode-emission.td
TwoLevelName.td
UnsetBitInit.td
unsetop.td [TableGen] Permit dag operators to be unset. 2019-12-10 11:09:40 +00:00
unterminated-c-comment-include.inc
unterminated-c-comment.td
unterminated-code-block-include.inc
unterminated-code-block.td
UnterminatedComment.td
usevalname.td
ValidIdentifiers.td