mirror of
https://github.com/RPCS3/llvm-mirror.git
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65e7766262
llvm-svn: 134030
142 lines
4.6 KiB
C++
142 lines
4.6 KiB
C++
//===- TargetRegisterInfo.cpp - Target Register Information Implementation ===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the TargetRegisterInfo interface.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
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regclass_iterator RCB, regclass_iterator RCE,
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const char *const *subregindexnames)
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: InfoDesc(ID), SubRegIndexNames(subregindexnames),
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RegClassBegin(RCB), RegClassEnd(RCE) {
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}
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TargetRegisterInfo::~TargetRegisterInfo() {}
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void PrintReg::print(raw_ostream &OS) const {
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if (!Reg)
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OS << "%noreg";
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else if (TargetRegisterInfo::isStackSlot(Reg))
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OS << "SS#" << TargetRegisterInfo::stackSlot2Index(Reg);
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else if (TargetRegisterInfo::isVirtualRegister(Reg))
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OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Reg);
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else if (TRI && Reg < TRI->getNumRegs())
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OS << '%' << TRI->getName(Reg);
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else
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OS << "%physreg" << Reg;
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if (SubIdx) {
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if (TRI)
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OS << ':' << TRI->getSubRegIndexName(SubIdx);
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else
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OS << ":sub(" << SubIdx << ')';
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}
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}
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/// getMinimalPhysRegClass - Returns the Register Class of a physical
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/// register of the given type, picking the most sub register class of
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/// the right type that contains this physreg.
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const TargetRegisterClass *
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TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
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assert(isPhysicalRegister(reg) && "reg must be a physical register");
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// Pick the most sub register class of the right type that contains
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// this physreg.
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const TargetRegisterClass* BestRC = 0;
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
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const TargetRegisterClass* RC = *I;
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if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
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(!BestRC || BestRC->hasSubClass(RC)))
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BestRC = RC;
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}
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assert(BestRC && "Couldn't find the register class");
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return BestRC;
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}
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/// getAllocatableSetForRC - Toggle the bits that represent allocatable
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/// registers for the specific register class.
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static void getAllocatableSetForRC(const MachineFunction &MF,
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const TargetRegisterClass *RC, BitVector &R){
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ArrayRef<unsigned> Order = RC->getRawAllocationOrder(MF);
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for (unsigned i = 0; i != Order.size(); ++i)
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R.set(Order[i]);
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}
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BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
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const TargetRegisterClass *RC) const {
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BitVector Allocatable(getNumRegs());
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if (RC) {
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getAllocatableSetForRC(MF, RC, Allocatable);
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} else {
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for (TargetRegisterInfo::regclass_iterator I = regclass_begin(),
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E = regclass_end(); I != E; ++I)
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if ((*I)->isAllocatable())
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getAllocatableSetForRC(MF, *I, Allocatable);
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}
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// Mask out the reserved registers
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BitVector Reserved = getReservedRegs(MF);
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Allocatable &= Reserved.flip();
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return Allocatable;
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}
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const TargetRegisterClass *
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llvm::getCommonSubClass(const TargetRegisterClass *A,
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const TargetRegisterClass *B) {
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// First take care of the trivial cases
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if (A == B)
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return A;
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if (!A || !B)
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return 0;
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// If B is a subclass of A, it will be handled in the loop below
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if (B->hasSubClass(A))
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return A;
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const TargetRegisterClass *Best = 0;
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for (TargetRegisterClass::sc_iterator I = A->subclasses_begin();
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const TargetRegisterClass *X = *I; ++I) {
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if (X == B)
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return B; // B is a subclass of A
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// X must be a common subclass of A and B
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if (!B->hasSubClass(X))
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continue;
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// A superclass is definitely better.
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if (!Best || Best->hasSuperClass(X)) {
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Best = X;
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continue;
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}
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// A subclass is definitely worse
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if (Best->hasSubClass(X))
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continue;
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// Best and *I have no super/sub class relation - pick the larger class, or
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// the smaller spill size.
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int nb = std::distance(Best->begin(), Best->end());
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int ni = std::distance(X->begin(), X->end());
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if (ni>nb || (ni==nb && X->getSize() < Best->getSize()))
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Best = X;
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}
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return Best;
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}
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