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llvm-mirror/test/CodeGen/Hexagon/ntstbit.ll
Roman Lebedev 169313ec4b UpdateTestChecks: hexagon support
Summary:
These tests are being affected by an upcoming patch,
so having an understandable (autogenerated) diff is helpful.

This target, again, prefers `-march`:
```
llvm/test/CodeGen/Hexagon$ grep -r triple | wc -l
467
llvm/test/CodeGen/Hexagon$ grep -r march | wc -l
1167
```

Reviewers: RKSimon, kparzysz

Reviewed By: kparzysz

Subscribers: xbolva00, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62867

llvm-svn: 362605
2019-06-05 14:08:01 +00:00

66 lines
1.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=hexagon < %s | FileCheck %s
; Function Attrs: nounwind
define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
; CHECK-LABEL: f0:
; CHECK: // %bb.0: // %b0
; CHECK-NEXT: {
; CHECK-NEXT: p0 = !tstbit(r1,r2)
; CHECK-NEXT: r17:16 = combine(r0,r1)
; CHECK-NEXT: memd(r29+#-16) = r17:16
; CHECK-NEXT: allocframe(#8)
; CHECK-NEXT: } // 8-byte Folded Spill
; CHECK-NEXT: {
; CHECK-NEXT: if (p0) jump:nt .LBB0_2
; CHECK-NEXT: }
; CHECK-NEXT: // %bb.1: // %b1
; CHECK-NEXT: {
; CHECK-NEXT: call f1
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: jump .LBB0_3
; CHECK-NEXT: }
; CHECK-NEXT: .LBB0_2: // %b2
; CHECK-NEXT: {
; CHECK-NEXT: call f2
; CHECK-NEXT: }
; CHECK-NEXT: .LBB0_3: // %b3
; CHECK-NEXT: {
; CHECK-NEXT: call f3
; CHECK-NEXT: r1 = add(r16,#2)
; CHECK-NEXT: r0 = r17
; CHECK-NEXT: }
; CHECK-NEXT: {
; CHECK-NEXT: r0 = #0
; CHECK-NEXT: r17:16 = memd(r29+#0)
; CHECK-NEXT: dealloc_return
; CHECK-NEXT: } // 8-byte Folded Reload
b0:
%v0 = shl i32 1, %a2
%v1 = and i32 %v0, %a1
%v2 = icmp eq i32 %v1, 0
br i1 %v2, label %b2, label %b1
b1: ; preds = %b0
tail call void bitcast (void (...)* @f1 to void ()*)() #0
br label %b3
b2: ; preds = %b0
%v3 = tail call i32 bitcast (i32 (...)* @f2 to i32 ()*)() #0
br label %b3
b3: ; preds = %b2, %b1
%v4 = add nsw i32 %a1, 2
%v5 = tail call i32 bitcast (i32 (...)* @f3 to i32 (i32, i32)*)(i32 %a0, i32 %v4) #0
ret i32 0
}
declare void @f1(...)
declare i32 @f2(...)
declare i32 @f3(...)
attributes #0 = { nounwind }