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f9268a010f
llvm-svn: 344791
22 lines
504 B
LLVM
22 lines
504 B
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: f0
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; CHECK-NOT: combine(#0
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; CHECK: jump f1
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define void @f0(i32* nocapture %a0) #0 {
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b0:
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%v0 = load i32, i32* %a0, align 4
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%v1 = zext i32 %v0 to i64
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%v2 = getelementptr inbounds i32, i32* %a0, i32 1
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%v3 = load i32, i32* %v2, align 4
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%v4 = zext i32 %v3 to i64
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%v5 = shl nuw i64 %v4, 32
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%v6 = or i64 %v5, %v1
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tail call void @f1(i64 %v6) #0
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ret void
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}
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declare void @f1(i64) #0
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attributes #0 = { nounwind "target-cpu"="hexagonv5" }
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