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llvm-mirror/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
Stanislav Mekhanoshin 324d0de803 [AMDGPU] Add VGPR copies post regalloc fix pass
Regalloc creates COPY instructions which do not formally use VALU.
That results in v_mov instructions displaced after exec mask modification.
One pass which do it is SIOptimizeExecMasking, but potentially it can be
done by other passes too.

This patch adds a pass immediately after regalloc to add implicit exec
use operand to all VGPR copy instructions.

Differential Revision: https://reviews.llvm.org/D28874

llvm-svn: 292956
2017-01-24 17:46:17 +00:00

45 lines
1.3 KiB
YAML

# RUN: llc -march=amdgcn -start-after=greedy -stop-after=si-optimize-exec-masking -o - %s | FileCheck %s
# Check that we first do all vector instructions and only then change exec
# CHECK-DAG: COPY %vgpr10_vgpr11
# CHECK-DAG: COPY %vgpr12_vgpr13
# CHECK: %exec = COPY
---
name: main
alignment: 0
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
tracksRegLiveness: true
liveins:
- { reg: '%sgpr4_sgpr5' }
- { reg: '%sgpr6' }
- { reg: '%vgpr0' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: false
hasCalls: false
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
body: |
bb.0.entry:
liveins: %vgpr3, %vgpr10_vgpr11, %vgpr12_vgpr13
%vcc = V_CMP_NE_U32_e64 0, killed %vgpr3, implicit %exec
%sgpr4_sgpr5 = COPY %exec, implicit-def %exec
%sgpr6_sgpr7 = S_AND_B64 %sgpr4_sgpr5, killed %vcc, implicit-def dead %scc
%sgpr4_sgpr5 = S_XOR_B64 %sgpr6_sgpr7, killed %sgpr4_sgpr5, implicit-def dead %scc
%vgpr61_vgpr62 = COPY %vgpr10_vgpr11
%vgpr155_vgpr156 = COPY %vgpr12_vgpr13
%exec = S_MOV_B64_term killed %sgpr6_sgpr7
...