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llvm-mirror/test/CodeGen
Mitch Bodart 8ebfa4a476 [CodeGen] Fix problem with X86 byte registers in CriticalAntiDepBreaker
CriticalAntiDepBreaker was not correctly tracking defs of the high X86 byte
registers, leading to incorrect use of a busy register to break an
antidependence.

Fixes pr27681, and its duplicates pr27580, pr27804.

Differential Revision: http://reviews.llvm.org/D20456

llvm-svn: 270935
2016-05-26 23:08:52 +00:00
..
AArch64 [AArch64] Generate rev16/rev32 from bswap + srl when upper bits are known zero. 2016-05-26 19:41:33 +00:00
AMDGPU AMDGPU/SI: Enable load-store-opt by default. 2016-05-26 19:35:29 +00:00
ARM
BPF [BPF] Remove exit-on-error flag in test (PR27767) 2016-05-26 15:23:50 +00:00
Generic
Hexagon [Hexagon] Enable the post-RA scheduler 2016-05-26 19:44:28 +00:00
Inputs
Lanai
Mips
MIR Add test/CodeGen/MIR/Hexagon/lit.local.cfg 2016-05-26 18:35:45 +00:00
MSP430
NVPTX [NVPTX] Added NVVMIntrRange pass 2016-05-26 17:02:56 +00:00
PowerPC
SPARC
SystemZ
Thumb
Thumb2
WebAssembly
WinEH
X86 [CodeGen] Fix problem with X86 byte registers in CriticalAntiDepBreaker 2016-05-26 23:08:52 +00:00
XCore