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AsmParser
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[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
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2016-08-16 17:14:44 +00:00 |
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Disassembler
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
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MCTargetDesc
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[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
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2016-08-19 15:17:19 +00:00 |
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TargetInfo
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BitTracker.cpp
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[Hexagon] Remove unnecessary llvm::, NFC
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2016-08-19 14:10:57 +00:00 |
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BitTracker.h
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[Hexagon-ish] Add function to print cell map contents in bit tracker
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2016-08-03 18:13:32 +00:00 |
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CMakeLists.txt
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[Hexagon] Delete HexagonSelectCCInfo.td
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2016-08-10 16:23:53 +00:00 |
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Hexagon.h
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Hexagon.td
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[Hexagon] Add target feature to generate long calls
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2016-07-25 14:42:11 +00:00 |
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HexagonAsmPrinter.cpp
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[Hexagon] Fix indentation, NFC
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2016-08-19 14:12:51 +00:00 |
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HexagonAsmPrinter.h
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HexagonBitSimplify.cpp
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[Hexagon] Standardize next batch of pseudo instructions
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2016-08-16 18:08:40 +00:00 |
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HexagonBitTracker.cpp
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[Hexagon] Handle J2_jumptpt and J2_jumpfpt instructions
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2016-08-19 14:14:09 +00:00 |
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HexagonBitTracker.h
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Hexagon: Avoid implicit iterator conversions, NFC
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2016-07-12 01:55:32 +00:00 |
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HexagonBlockRanges.cpp
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Use the range variant of find/find_if instead of unpacking begin/end
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2016-08-12 03:55:06 +00:00 |
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HexagonBlockRanges.h
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
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HexagonBranchRelaxation.cpp
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[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
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2016-07-29 21:49:42 +00:00 |
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HexagonCallingConv.td
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HexagonCFGOptimizer.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonCommonGEP.cpp
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CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
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2016-08-24 01:52:46 +00:00 |
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HexagonConstPropagation.cpp
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[Hexagon] Standardize next batch of pseudo instructions
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2016-08-16 18:08:40 +00:00 |
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HexagonCopyToCombine.cpp
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[Hexagon] Remove extraneous debug output from HexagonCopyToCombine.cpp
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2016-08-25 16:46:09 +00:00 |
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HexagonEarlyIfConv.cpp
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[Hexagon] Standardize "select" pseudo-instructions
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2016-08-11 19:12:18 +00:00 |
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HexagonExpandCondsets.cpp
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[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
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2016-08-24 22:27:36 +00:00 |
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HexagonFixupHwLoops.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonFrameLowering.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonFrameLowering.h
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[Hexagon] Check for offset overflow when reserving scavenging slots
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2016-08-01 17:15:30 +00:00 |
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HexagonGenExtract.cpp
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CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
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2016-08-24 01:52:46 +00:00 |
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HexagonGenInsert.cpp
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Use the range variant of remove_if instead of unpacking begin/end
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2016-08-12 04:32:37 +00:00 |
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HexagonGenMux.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonGenPredicate.cpp
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Hexagon: Avoid implicit iterator conversions, NFC
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2016-07-12 01:55:32 +00:00 |
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HexagonHardwareLoops.cpp
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MachineLoop: add methods findLoopControlBlock and findLoopPreheader
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2016-08-15 08:22:42 +00:00 |
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HexagonHazardRecognizer.cpp
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[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
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2016-07-29 21:49:42 +00:00 |
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HexagonHazardRecognizer.h
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Fix license information in the file header
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2016-07-29 14:04:17 +00:00 |
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HexagonInstrAlias.td
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[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
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2016-08-16 17:14:44 +00:00 |
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HexagonInstrEnc.td
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HexagonInstrFormats.td
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[Hexagon] Update instruction itineraries
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2016-07-15 16:58:34 +00:00 |
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HexagonInstrFormatsV4.td
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[Hexagon] Update instruction itineraries
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2016-07-15 16:58:34 +00:00 |
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HexagonInstrFormatsV60.td
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HexagonInstrInfo.cpp
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[Hexagon] Fix subesthetic indentation
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2016-08-19 19:29:15 +00:00 |
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HexagonInstrInfo.h
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[Hexagon] Allow non-returning calls in hardware loops
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2016-08-11 21:14:25 +00:00 |
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HexagonInstrInfo.td
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[Hexagon] Do not cache alloca instructions during isel
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2016-08-19 18:46:13 +00:00 |
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HexagonInstrInfoV3.td
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[Hexagon] Standardize pseudo-instructions for calls and returns
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2016-08-12 11:12:02 +00:00 |
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HexagonInstrInfoV4.td
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[Hexagon] Fix incorrect generation of S4_subi_asl_ri
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2016-08-19 16:35:05 +00:00 |
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HexagonInstrInfoV5.td
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[Hexagon] Improvements to handling and generation of FP instructions
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2016-08-19 13:34:31 +00:00 |
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HexagonInstrInfoV60.td
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[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
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2016-08-16 17:14:44 +00:00 |
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HexagonInstrInfoVector.td
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[Hexagon] Standardize next batch of pseudo instructions
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2016-08-16 18:08:40 +00:00 |
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HexagonIntrinsics.td
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[Hexagon] Handle operand type differences for A2_tfrpi
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2016-05-05 15:29:47 +00:00 |
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HexagonIntrinsicsDerived.td
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HexagonIntrinsicsV3.td
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HexagonIntrinsicsV4.td
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[Hexagon] Use common Pat classes for selecting code for intrinsics
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2016-04-22 18:05:55 +00:00 |
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HexagonIntrinsicsV5.td
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[Hexagon] Use common Pat classes for selecting code for intrinsics
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2016-04-22 18:05:55 +00:00 |
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HexagonIntrinsicsV60.td
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[Hexagon] Clean up some miscellaneous V60 intrinsics a bit
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2016-08-16 17:14:44 +00:00 |
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HexagonISelDAGToDAG.cpp
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[Hexagon] Fix subesthetic indentation
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2016-08-19 19:29:15 +00:00 |
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HexagonISelLowering.cpp
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[Hexagon] Fix subesthetic indentation
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2016-08-19 19:29:15 +00:00 |
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HexagonISelLowering.h
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[Hexagon] Do not cache alloca instructions during isel
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2016-08-19 18:46:13 +00:00 |
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HexagonIsetDx.td
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[Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
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2016-08-19 15:17:19 +00:00 |
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HexagonMachineFunctionInfo.cpp
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HexagonMachineFunctionInfo.h
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[Hexagon] Do not cache alloca instructions during isel
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2016-08-19 18:46:13 +00:00 |
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HexagonMachineScheduler.cpp
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Move helpers into anonymous namespaces. NFC.
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2016-08-06 11:13:10 +00:00 |
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HexagonMachineScheduler.h
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Use the range variant of find instead of unpacking begin/end
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2016-08-11 22:21:41 +00:00 |
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HexagonMCInstLower.cpp
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HexagonNewValueJump.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonOperands.td
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[Hexagon] Improve patterns with stack-based addressing
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2016-07-15 15:35:52 +00:00 |
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HexagonOptAddrMode.cpp
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[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
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2016-07-29 21:49:42 +00:00 |
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HexagonOptimizeSZextends.cpp
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CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
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2016-08-24 01:52:46 +00:00 |
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HexagonPeephole.cpp
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[Hexagon] Clear kill flags from modified registers in peephole optimizer
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2016-08-04 14:17:16 +00:00 |
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HexagonRDF.cpp
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HexagonRDF.h
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
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HexagonRDFOpt.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonRegisterInfo.cpp
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[Hexagon] Improvements to handling and generation of FP instructions
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2016-08-19 13:34:31 +00:00 |
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HexagonRegisterInfo.h
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[Hexagon] Make getCallerSavedRegs specific to a register class
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2016-05-16 18:02:28 +00:00 |
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HexagonRegisterInfo.td
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[Hexagon] Minor updates to register definitions
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2016-08-19 16:40:19 +00:00 |
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HexagonSchedule.td
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HexagonScheduleV4.td
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[Hexagon] Update instruction itineraries
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2016-07-15 16:58:34 +00:00 |
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HexagonScheduleV55.td
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[Hexagon] Update instruction itineraries
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2016-07-15 16:58:34 +00:00 |
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HexagonScheduleV60.td
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[Hexagon] Update instruction itineraries
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2016-07-15 16:58:34 +00:00 |
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HexagonSelectionDAGInfo.cpp
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[Hexagon] Add target feature to generate long calls
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2016-07-25 14:42:11 +00:00 |
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HexagonSelectionDAGInfo.h
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[Hexagon] Add explicit default constructor for HexagonSelectionDAGInfo
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2016-08-19 15:13:54 +00:00 |
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HexagonSplitConst32AndConst64.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonSplitDouble.cpp
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Replace a few more "fall through" comments with LLVM_FALLTHROUGH
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2016-08-17 20:30:52 +00:00 |
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HexagonStoreWidening.cpp
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Add optimization bisect opt-in calls for Hexagon passes
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2016-04-26 19:46:28 +00:00 |
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HexagonSubtarget.cpp
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[Hexagon] Enable subregister liveness tracking
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2016-08-24 17:17:39 +00:00 |
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HexagonSubtarget.h
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[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
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2016-07-29 21:49:42 +00:00 |
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HexagonSystemInst.td
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[Hexagon] Add definitions for trap/pause instructions
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2016-04-22 16:25:00 +00:00 |
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HexagonTargetMachine.cpp
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[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
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2016-08-24 22:27:36 +00:00 |
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HexagonTargetMachine.h
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Delete Reloc::Default.
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2016-05-18 22:04:49 +00:00 |
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HexagonTargetObjectFile.cpp
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[Hexagon] Expand handling of the small-data/bss section
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2016-04-21 18:56:45 +00:00 |
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HexagonTargetObjectFile.h
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[Hexagon] Expand handling of the small-data/bss section
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2016-04-21 18:56:45 +00:00 |
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HexagonTargetStreamer.h
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HexagonTargetTransformInfo.cpp
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[Hexagon] Consider zext/sext of a load to i32 to be free
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2016-08-19 14:22:07 +00:00 |
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HexagonTargetTransformInfo.h
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[Hexagon] Consider zext/sext of a load to i32 to be free
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2016-08-19 14:22:07 +00:00 |
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HexagonVectorPrint.cpp
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[Hexagon] vector store print tracing.
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2016-08-25 13:35:48 +00:00 |
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HexagonVLIWPacketizer.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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HexagonVLIWPacketizer.h
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[Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC
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2016-07-29 21:49:42 +00:00 |
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LLVMBuild.txt
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[Hexagon] Make HexagonCodeGen depend on Scalar
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2016-07-22 17:23:46 +00:00 |
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RDFCopy.cpp
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
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RDFCopy.h
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
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RDFDeadCode.cpp
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RDFDeadCode.h
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
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RDFGraph.cpp
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Use range algorithms instead of unpacking begin/end
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2016-08-11 21:15:00 +00:00 |
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RDFGraph.h
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[RDF] Make the graph construction/use less expensive
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2016-07-22 16:09:47 +00:00 |
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RDFLiveness.cpp
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Use range algorithms instead of unpacking begin/end
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2016-08-11 21:15:00 +00:00 |
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RDFLiveness.h
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[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
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2016-05-27 10:06:40 +00:00 |
