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fac3a79629
This is a preliminary patch for fast instruction selection on PowerPC. Code generation can differ between DAG isel and fast isel. Existing tests that specify -O0 were written to expect DAG isel. Make this explicit by adding -fast-isel=false to the tests. In some cases specifying -fast-isel=false produces different code even when there isn't a fast instruction selector specified. This is because TM.Options.EnableFastISel = 1 at -O0 whether or not a FastISel object exists. Thus disabling fast isel can actually produce less conservative code. Because of this, some of the expected code generation in the -O0 tests needs to be adjusted. In particular, handling of function arguments is less conservative with -fast-isel=false (see isOnlyUsedInEntryBlock() in SelectionDAGBuilder.cpp). This results in fewer stack accesses and, in some cases, reduced stack size as uselessly loaded values are no longer stored back to spill locations in the stack. No functional change with this patch; test case adjustments only. llvm-svn: 183939
27 lines
871 B
LLVM
27 lines
871 B
LLVM
; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s
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; Verify internal alignment of long double in a struct. The double
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; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain
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; the long double. Check that these are stored to proper locations
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; in the parameter save area and loaded from there for return in FPR1/2.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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%struct.S = type { double, ppc_fp128 }
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define ppc_fp128 @test(%struct.S* byval %x) nounwind {
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entry:
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%b = getelementptr inbounds %struct.S* %x, i32 0, i32 1
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%0 = load ppc_fp128* %b, align 16
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ret ppc_fp128 %0
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}
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; CHECK: std 6, 72(1)
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; CHECK: std 5, 64(1)
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; CHECK: std 4, 56(1)
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; CHECK: std 3, 48(1)
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; CHECK: lfd 1, 64(1)
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; CHECK: lfd 2, 72(1)
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