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Mirror of https://github.com/RPCS3/llvm-mirror
de50517235
It uses VGPR_32.RegTypes which includes 16 bit types. As a result DS_WRITE_B32 may be generated for "store i16" which is a bug. The only reason we do not hit it now is relative patterns complexity and sorting. Should DS_WRITE_B16 pattern complexity become higher and the bug appears. Differential Revision: https://reviews.llvm.org/D74868 |
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configure | ||
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