Amara Emerson de52a239bd [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen. ... When generating the IfTrue basic block during the F128CSEL pseudo-instruction handling, the NZCV live-in for the newly created BB wasn't being added. This caused a fault during MI-sched/live range calculation when the predecessor for the fall-through BB didn't have a live-in for phys-reg as expected. llvm-svn: 193316		2013-10-24 08:28:24 +00:00
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AArch64	[AArch64] Fix NZCV reg live-in bug in F128CSEL codegen.	2013-10-24 08:28:24 +00:00
ARM	17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets	2013-10-17 19:52:05 +00:00
CPP
Generic	Change objectsize intrinsic to accept different address spaces.	2013-10-07 18:06:48 +00:00
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs
Mips	[mips][msa] Added support for matching fexp2 from normal IR (i.e. not intrinsics)	2013-10-23 10:36:52 +00:00
MSP430	Fix MSP430 calling convention to match MSPGCC	2013-10-15 08:19:39 +00:00
NVPTX	[NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc	2013-10-11 12:39:39 +00:00
PowerPC	Update PPC loop tests after SCEV non-unit-stride checkin r193015.	2013-10-19 00:14:04 +00:00
R600	R600/SI: fix MIMG writemask adjustement	2013-10-23 02:53:47 +00:00
SPARC	[Sparc] Disable tail call optimization for sparc64.	2013-10-09 12:50:39 +00:00
SystemZ	Replace sra with srl if a single sign bit is required	2013-10-17 11:16:57 +00:00
Thumb	17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets	2013-10-17 19:52:05 +00:00
Thumb2	MachineSink: Fix and tweak critical-edge breaking heuristic.	2013-10-14 16:57:17 +00:00
X86	AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics	2013-10-24 07:16:35 +00:00
XCore	XCore target fix bug in emitArrayBound() causing segmentation fault	2013-10-11 10:27:13 +00:00