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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
60 lines
1.4 KiB
ArmAsm
60 lines
1.4 KiB
ArmAsm
// RUN: llvm-mc < %s -triple=aarch64-none-linux-gnu -filetype=obj | llvm-readobj -r | FileCheck %s
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.file "<stdin>"
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.text
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.globl test_jumptable
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.type test_jumptable,@function
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test_jumptable: // @test_jumptable
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.cfi_startproc
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// BB#0:
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ubfx w1, w0, #0, #32
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cmp w0, #4
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b.hi .LBB0_3
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// BB#1:
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adrp x0, .LJTI0_0
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add x0, x0, #:lo12:.LJTI0_0
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ldr x0, [x0, x1, lsl #3]
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br x0
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.LBB0_2: // %lbl1
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movz x0, #1
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ret
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.LBB0_3: // %def
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mov x0, xzr
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ret
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.LBB0_4: // %lbl2
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movz x0, #2
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ret
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.LBB0_5: // %lbl3
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movz x0, #4
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ret
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.LBB0_6: // %lbl4
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movz x0, #8
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ret
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.Ltmp0:
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.size test_jumptable, .Ltmp0-test_jumptable
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.cfi_endproc
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.section .rodata,"a",@progbits
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.align 3
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.LJTI0_0:
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.xword .LBB0_2
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.xword .LBB0_4
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.xword .LBB0_5
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.xword .LBB0_3
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.xword .LBB0_6
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// First make sure we get a page/lo12 pair in .text to pick up the jump-table
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// CHECK: Relocations [
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// CHECK: Section ({{[0-9]+}}) .rela.text {
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 .rodata
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC .rodata
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// CHECK: }
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// Also check the targets in .rodata are relocated
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// CHECK: Section ({{[0-9]+}}) .rela.rodata {
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// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ABS64 .text
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// CHECK: }
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// CHECK: ]
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