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https://github.com/RPCS3/llvm-mirror.git
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d7f173214f
I'm doing this in two phases for a better "git blame" record. This commit removes the previous AArch64 backend and redirects all functionality to ARM64. It also deduplicates test-lines and removes orphaned AArch64 tests. The next step will be "git mv ARM64 AArch64" and rewire most of the tests. Hopefully LLVM is still functional, though it would be even better if no-one ever had to care because the rename happens straight afterwards. llvm-svn: 209576
102 lines
4.2 KiB
ArmAsm
102 lines
4.2 KiB
ArmAsm
// RUN: llvm-mc -triple=arm64 -mattr=+neon -show-encoding < %s | FileCheck %s
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// Check that the assembler can handle the documented syntax for AArch64
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//------------------------------------------------------------------------------
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// Instructions across vector registers
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//------------------------------------------------------------------------------
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saddlv h0, v1.8b
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saddlv h0, v1.16b
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saddlv s0, v1.4h
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saddlv s0, v1.8h
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saddlv d0, v1.4s
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// CHECK: saddlv h0, v1.8b // encoding: [0x20,0x38,0x30,0x0e]
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// CHECK: saddlv h0, v1.16b // encoding: [0x20,0x38,0x30,0x4e]
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// CHECK: saddlv s0, v1.4h // encoding: [0x20,0x38,0x70,0x0e]
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// CHECK: saddlv s0, v1.8h // encoding: [0x20,0x38,0x70,0x4e]
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// CHECK: saddlv d0, v1.4s // encoding: [0x20,0x38,0xb0,0x4e]
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uaddlv h0, v1.8b
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uaddlv h0, v1.16b
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uaddlv s0, v1.4h
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uaddlv s0, v1.8h
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uaddlv d0, v1.4s
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// CHECK: uaddlv h0, v1.8b // encoding: [0x20,0x38,0x30,0x2e]
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// CHECK: uaddlv h0, v1.16b // encoding: [0x20,0x38,0x30,0x6e]
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// CHECK: uaddlv s0, v1.4h // encoding: [0x20,0x38,0x70,0x2e]
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// CHECK: uaddlv s0, v1.8h // encoding: [0x20,0x38,0x70,0x6e]
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// CHECK: uaddlv d0, v1.4s // encoding: [0x20,0x38,0xb0,0x6e]
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smaxv b0, v1.8b
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smaxv b0, v1.16b
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smaxv h0, v1.4h
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smaxv h0, v1.8h
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smaxv s0, v1.4s
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// CHECK: smaxv b0, v1.8b // encoding: [0x20,0xa8,0x30,0x0e]
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// CHECK: smaxv b0, v1.16b // encoding: [0x20,0xa8,0x30,0x4e]
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// CHECK: smaxv h0, v1.4h // encoding: [0x20,0xa8,0x70,0x0e]
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// CHECK: smaxv h0, v1.8h // encoding: [0x20,0xa8,0x70,0x4e]
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// CHECK: smaxv s0, v1.4s // encoding: [0x20,0xa8,0xb0,0x4e]
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sminv b0, v1.8b
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sminv b0, v1.16b
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sminv h0, v1.4h
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sminv h0, v1.8h
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sminv s0, v1.4s
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// CHECK: sminv b0, v1.8b // encoding: [0x20,0xa8,0x31,0x0e]
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// CHECK: sminv b0, v1.16b // encoding: [0x20,0xa8,0x31,0x4e]
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// CHECK: sminv h0, v1.4h // encoding: [0x20,0xa8,0x71,0x0e]
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// CHECK: sminv h0, v1.8h // encoding: [0x20,0xa8,0x71,0x4e]
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// CHECK: sminv s0, v1.4s // encoding: [0x20,0xa8,0xb1,0x4e]
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umaxv b0, v1.8b
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umaxv b0, v1.16b
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umaxv h0, v1.4h
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umaxv h0, v1.8h
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umaxv s0, v1.4s
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// CHECK: umaxv b0, v1.8b // encoding: [0x20,0xa8,0x30,0x2e]
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// CHECK: umaxv b0, v1.16b // encoding: [0x20,0xa8,0x30,0x6e]
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// CHECK: umaxv h0, v1.4h // encoding: [0x20,0xa8,0x70,0x2e]
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// CHECK: umaxv h0, v1.8h // encoding: [0x20,0xa8,0x70,0x6e]
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// CHECK: umaxv s0, v1.4s // encoding: [0x20,0xa8,0xb0,0x6e]
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uminv b0, v1.8b
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uminv b0, v1.16b
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uminv h0, v1.4h
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uminv h0, v1.8h
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uminv s0, v1.4s
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// CHECK: uminv b0, v1.8b // encoding: [0x20,0xa8,0x31,0x2e]
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// CHECK: uminv b0, v1.16b // encoding: [0x20,0xa8,0x31,0x6e]
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// CHECK: uminv h0, v1.4h // encoding: [0x20,0xa8,0x71,0x2e]
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// CHECK: uminv h0, v1.8h // encoding: [0x20,0xa8,0x71,0x6e]
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// CHECK: uminv s0, v1.4s // encoding: [0x20,0xa8,0xb1,0x6e]
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addv b0, v1.8b
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addv b0, v1.16b
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addv h0, v1.4h
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addv h0, v1.8h
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addv s0, v1.4s
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// CHECK: addv b0, v1.8b // encoding: [0x20,0xb8,0x31,0x0e]
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// CHECK: addv b0, v1.16b // encoding: [0x20,0xb8,0x31,0x4e]
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// CHECK: addv h0, v1.4h // encoding: [0x20,0xb8,0x71,0x0e]
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// CHECK: addv h0, v1.8h // encoding: [0x20,0xb8,0x71,0x4e]
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// CHECK: addv s0, v1.4s // encoding: [0x20,0xb8,0xb1,0x4e]
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fmaxnmv s0, v1.4s
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fminnmv s0, v1.4s
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fmaxv s0, v1.4s
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fminv s0, v1.4s
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// CHECK: fmaxnmv s0, v1.4s // encoding: [0x20,0xc8,0x30,0x6e]
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// CHECK: fminnmv s0, v1.4s // encoding: [0x20,0xc8,0xb0,0x6e]
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// CHECK: fmaxv s0, v1.4s // encoding: [0x20,0xf8,0x30,0x6e]
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// CHECK: fminv s0, v1.4s // encoding: [0x20,0xf8,0xb0,0x6e]
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