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llvm-mirror/test/MC/AArch64/neon-tbl.s
Tim Northover d7f173214f AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.

The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.

Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.

llvm-svn: 209576
2014-05-24 12:42:26 +00:00

56 lines
3.1 KiB
ArmAsm

// RUN: llvm-mc -triple=arm64 -mattr=+neon -show-encoding < %s | FileCheck %s
// Check that the assembler can handle the documented syntax for AArch64
//------------------------------------------------------------------------------
// Instructions across vector registers
//------------------------------------------------------------------------------
tbl v0.8b, { v1.16b }, v2.8b
tbl v0.8b, { v1.16b, v2.16b }, v2.8b
tbl v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b
tbl v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b
tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b
// CHECK: tbl v0.8b, { v1.16b }, v2.8b // encoding: [0x20,0x00,0x02,0x0e]
// CHECK: tbl v0.8b, { v1.16b, v2.16b }, v2.8b // encoding: [0x20,0x20,0x02,0x0e]
// CHECK: tbl v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b // encoding: [0x20,0x40,0x02,0x0e]
// CHECK: tbl v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b // encoding: [0x20,0x60,0x02,0x0e]
// CHECK: tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x63,0x02,0x0e]
tbl v0.16b, { v1.16b }, v2.16b
tbl v0.16b, { v1.16b, v2.16b }, v2.16b
tbl v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b
tbl v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b
tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
// CHECK: tbl v0.16b, { v1.16b }, v2.16b // encoding: [0x20,0x00,0x02,0x4e]
// CHECK: tbl v0.16b, { v1.16b, v2.16b }, v2.16b // encoding: [0x20,0x20,0x02,0x4e]
// CHECK: tbl v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b // encoding: [0x20,0x40,0x02,0x4e]
// CHECK: tbl v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b // encoding: [0x20,0x60,0x02,0x4e]
// CHECK: tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x63,0x02,0x4e]
tbx v0.8b, { v1.16b }, v2.8b
tbx v0.8b, { v1.16b, v2.16b }, v2.8b
tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b
tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b
tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b
// CHECK: tbx v0.8b, { v1.16b }, v2.8b // encoding: [0x20,0x10,0x02,0x0e]
// CHECK: tbx v0.8b, { v1.16b, v2.16b }, v2.8b // encoding: [0x20,0x30,0x02,0x0e]
// CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b // encoding: [0x20,0x50,0x02,0x0e]
// CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b // encoding: [0x20,0x70,0x02,0x0e]
// CHECK: tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x73,0x02,0x0e]
tbx v0.16b, { v1.16b }, v2.16b
tbx v0.16b, { v1.16b, v2.16b }, v2.16b
tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b
tbx v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b
tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
// CHECK: tbx v0.16b, { v1.16b }, v2.16b // encoding: [0x20,0x10,0x02,0x4e]
// CHECK: tbx v0.16b, { v1.16b, v2.16b }, v2.16b // encoding: [0x20,0x30,0x02,0x4e]
// CHECK: tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b // encoding: [0x20,0x50,0x02,0x4e]
// CHECK: tbx v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b // encoding: [0x20,0x70,0x02,0x4e]
// CHECK: tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x73,0x02,0x4e]