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d069b95364
Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D93813
142 lines
5.3 KiB
C++
142 lines
5.3 KiB
C++
//===--- AMDGPUMachineModuleInfo.h ------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// AMDGPU Machine Module Info.
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///
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEMODULEINFO_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEMODULEINFO_H
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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namespace llvm {
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class AMDGPUMachineModuleInfo final : public MachineModuleInfoELF {
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private:
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// All supported memory/synchronization scopes can be found here:
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// http://llvm.org/docs/AMDGPUUsage.html#memory-scopes
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/// Agent synchronization scope ID (cross address space).
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SyncScope::ID AgentSSID;
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/// Workgroup synchronization scope ID (cross address space).
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SyncScope::ID WorkgroupSSID;
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/// Wavefront synchronization scope ID (cross address space).
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SyncScope::ID WavefrontSSID;
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/// System synchronization scope ID (single address space).
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SyncScope::ID SystemOneAddressSpaceSSID;
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/// Agent synchronization scope ID (single address space).
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SyncScope::ID AgentOneAddressSpaceSSID;
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/// Workgroup synchronization scope ID (single address space).
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SyncScope::ID WorkgroupOneAddressSpaceSSID;
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/// Wavefront synchronization scope ID (single address space).
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SyncScope::ID WavefrontOneAddressSpaceSSID;
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/// Single thread synchronization scope ID (single address space).
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SyncScope::ID SingleThreadOneAddressSpaceSSID;
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/// In AMDGPU target synchronization scopes are inclusive, meaning a
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/// larger synchronization scope is inclusive of a smaller synchronization
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/// scope.
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///
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/// \returns \p SSID's inclusion ordering, or "None" if \p SSID is not
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/// supported by the AMDGPU target.
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Optional<uint8_t> getSyncScopeInclusionOrdering(SyncScope::ID SSID) const {
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if (SSID == SyncScope::SingleThread ||
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SSID == getSingleThreadOneAddressSpaceSSID())
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return 0;
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else if (SSID == getWavefrontSSID() ||
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SSID == getWavefrontOneAddressSpaceSSID())
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return 1;
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else if (SSID == getWorkgroupSSID() ||
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SSID == getWorkgroupOneAddressSpaceSSID())
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return 2;
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else if (SSID == getAgentSSID() ||
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SSID == getAgentOneAddressSpaceSSID())
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return 3;
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else if (SSID == SyncScope::System ||
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SSID == getSystemOneAddressSpaceSSID())
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return 4;
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return None;
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}
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/// \returns True if \p SSID is restricted to single address space, false
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/// otherwise
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bool isOneAddressSpace(SyncScope::ID SSID) const {
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return SSID == getSingleThreadOneAddressSpaceSSID() ||
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SSID == getWavefrontOneAddressSpaceSSID() ||
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SSID == getWorkgroupOneAddressSpaceSSID() ||
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SSID == getAgentOneAddressSpaceSSID() ||
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SSID == getSystemOneAddressSpaceSSID();
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}
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public:
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AMDGPUMachineModuleInfo(const MachineModuleInfo &MMI);
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/// \returns Agent synchronization scope ID (cross address space).
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SyncScope::ID getAgentSSID() const {
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return AgentSSID;
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}
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/// \returns Workgroup synchronization scope ID (cross address space).
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SyncScope::ID getWorkgroupSSID() const {
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return WorkgroupSSID;
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}
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/// \returns Wavefront synchronization scope ID (cross address space).
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SyncScope::ID getWavefrontSSID() const {
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return WavefrontSSID;
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}
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/// \returns System synchronization scope ID (single address space).
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SyncScope::ID getSystemOneAddressSpaceSSID() const {
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return SystemOneAddressSpaceSSID;
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}
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/// \returns Agent synchronization scope ID (single address space).
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SyncScope::ID getAgentOneAddressSpaceSSID() const {
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return AgentOneAddressSpaceSSID;
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}
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/// \returns Workgroup synchronization scope ID (single address space).
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SyncScope::ID getWorkgroupOneAddressSpaceSSID() const {
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return WorkgroupOneAddressSpaceSSID;
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}
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/// \returns Wavefront synchronization scope ID (single address space).
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SyncScope::ID getWavefrontOneAddressSpaceSSID() const {
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return WavefrontOneAddressSpaceSSID;
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}
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/// \returns Single thread synchronization scope ID (single address space).
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SyncScope::ID getSingleThreadOneAddressSpaceSSID() const {
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return SingleThreadOneAddressSpaceSSID;
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}
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/// In AMDGPU target synchronization scopes are inclusive, meaning a
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/// larger synchronization scope is inclusive of a smaller synchronization
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/// scope.
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///
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/// \returns True if synchronization scope \p A is larger than or equal to
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/// synchronization scope \p B, false if synchronization scope \p A is smaller
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/// than synchronization scope \p B, or "None" if either synchronization scope
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/// \p A or \p B is not supported by the AMDGPU target.
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Optional<bool> isSyncScopeInclusion(SyncScope::ID A, SyncScope::ID B) const {
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const auto &AIO = getSyncScopeInclusionOrdering(A);
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const auto &BIO = getSyncScopeInclusionOrdering(B);
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if (!AIO || !BIO)
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return None;
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bool IsAOneAddressSpace = isOneAddressSpace(A);
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bool IsBOneAddressSpace = isOneAddressSpace(B);
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return AIO.getValue() >= BIO.getValue() &&
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(IsAOneAddressSpace == IsBOneAddressSpace || !IsAOneAddressSpace);
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}
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEMODULEINFO_H
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