mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 12:12:47 +01:00
bb52bc77a5
This patch uses AtomicExpandPass to implement quadword lock free atomic operations. It adopts the method introduced in https://reviews.llvm.org/D47882, which expand atomic operations post RA to avoid spilling that might prevent LL/SC progress. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D103614
86 lines
2.1 KiB
CMake
86 lines
2.1 KiB
CMake
add_llvm_component_group(PowerPC HAS_JIT)
|
|
|
|
set(LLVM_TARGET_DEFINITIONS PPC.td)
|
|
|
|
tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
|
|
tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
|
|
tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
|
|
tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
|
|
tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
|
|
tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
|
|
tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
|
|
tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
|
|
tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
|
|
tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
|
|
tablegen(LLVM PPCGenExegesis.inc -gen-exegesis)
|
|
tablegen(LLVM PPCGenRegisterBank.inc -gen-register-bank)
|
|
tablegen(LLVM PPCGenGlobalISel.inc -gen-global-isel)
|
|
|
|
add_public_tablegen_target(PowerPCCommonTableGen)
|
|
|
|
add_llvm_target(PowerPCCodeGen
|
|
GISel/PPCInstructionSelector.cpp
|
|
PPCBoolRetToInt.cpp
|
|
PPCAsmPrinter.cpp
|
|
PPCBranchSelector.cpp
|
|
PPCBranchCoalescing.cpp
|
|
PPCCallingConv.cpp
|
|
PPCCCState.cpp
|
|
PPCCTRLoops.cpp
|
|
PPCExpandAtomicPseudoInsts.cpp
|
|
PPCHazardRecognizers.cpp
|
|
PPCInstrInfo.cpp
|
|
PPCISelDAGToDAG.cpp
|
|
PPCISelLowering.cpp
|
|
PPCEarlyReturn.cpp
|
|
PPCFastISel.cpp
|
|
PPCFrameLowering.cpp
|
|
PPCLoopInstrFormPrep.cpp
|
|
PPCMCInstLower.cpp
|
|
PPCMachineFunctionInfo.cpp
|
|
PPCMachineScheduler.cpp
|
|
PPCMacroFusion.cpp
|
|
PPCMIPeephole.cpp
|
|
PPCRegisterInfo.cpp
|
|
PPCSubtarget.cpp
|
|
PPCTargetMachine.cpp
|
|
PPCTargetObjectFile.cpp
|
|
PPCTargetTransformInfo.cpp
|
|
PPCTOCRegDeps.cpp
|
|
PPCTLSDynamicCall.cpp
|
|
PPCVSXCopy.cpp
|
|
PPCReduceCRLogicals.cpp
|
|
PPCVSXFMAMutate.cpp
|
|
PPCVSXSwapRemoval.cpp
|
|
PPCExpandISEL.cpp
|
|
PPCPreEmitPeephole.cpp
|
|
PPCLowerMASSVEntries.cpp
|
|
GISel/PPCCallLowering.cpp
|
|
GISel/PPCRegisterBankInfo.cpp
|
|
GISel/PPCLegalizerInfo.cpp
|
|
|
|
LINK_COMPONENTS
|
|
Analysis
|
|
AsmPrinter
|
|
BinaryFormat
|
|
CodeGen
|
|
Core
|
|
MC
|
|
PowerPCDesc
|
|
PowerPCInfo
|
|
Scalar
|
|
SelectionDAG
|
|
Support
|
|
Target
|
|
TransformUtils
|
|
GlobalISel
|
|
|
|
ADD_TO_COMPONENT
|
|
PowerPC
|
|
)
|
|
|
|
add_subdirectory(AsmParser)
|
|
add_subdirectory(Disassembler)
|
|
add_subdirectory(MCTargetDesc)
|
|
add_subdirectory(TargetInfo)
|