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llvm-mirror/test/CodeGen/R600/llvm.AMDGPU.trunc.ll
Tom Stellard c6c9cd5b09 Revert "R600: Non vector only instruction can be scheduled on trans unit"
This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6.

llvm-svn: 187526
2013-07-31 20:43:27 +00:00

17 lines
519 B
LLVM

; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
; R600-CHECK: @amdgpu_trunc
; R600-CHECK: TRUNC * T{{[0-9]+\.[XYZW]}}, KC0[2].Z
; SI-CHECK: @amdgpu_trunc
; SI-CHECK: V_TRUNC_F32
define void @amdgpu_trunc(float addrspace(1)* %out, float %x) {
entry:
%0 = call float @llvm.AMDGPU.trunc(float %x)
store float %0, float addrspace(1)* %out
ret void
}
declare float @llvm.AMDGPU.trunc(float ) readnone