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1e20340b43
Summary: We rely on this in our CHERI backend to address the GOT by generating a $pc-relative addresses. For this we emit the following code sequence: lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8) daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4) cgetpccincoffset $c1, $1 However, without this change the addend is implicitly converted to UINT32_MAX and an invalid pointer value is generated. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70953
54 lines
1.8 KiB
C++
54 lines
1.8 KiB
C++
//===- MipsMCInstLower.h - Lower MachineInstr to MCInst --------*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSMCINSTLOWER_H
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#define LLVM_LIB_TARGET_MIPS_MIPSMCINSTLOWER_H
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#include "MCTargetDesc/MipsMCExpr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/Support/Compiler.h"
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namespace llvm {
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class MachineBasicBlock;
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class MachineInstr;
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class MCContext;
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class MCInst;
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class MCOperand;
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class MipsAsmPrinter;
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/// MipsMCInstLower - This class is used to lower an MachineInstr into an
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/// MCInst.
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class LLVM_LIBRARY_VISIBILITY MipsMCInstLower {
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using MachineOperandType = MachineOperand::MachineOperandType;
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MCContext *Ctx;
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MipsAsmPrinter &AsmPrinter;
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public:
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MipsMCInstLower(MipsAsmPrinter &asmprinter);
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void Initialize(MCContext *C);
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void Lower(const MachineInstr *MI, MCInst &OutMI) const;
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MCOperand LowerOperand(const MachineOperand &MO, int64_t offset = 0) const;
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private:
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MCOperand LowerSymbolOperand(const MachineOperand &MO,
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MachineOperandType MOTy, int64_t Offset) const;
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MCOperand createSub(MachineBasicBlock *BB1, MachineBasicBlock *BB2,
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MipsMCExpr::MipsExprKind Kind) const;
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void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
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void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
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int Opcode) const;
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bool lowerLongBranch(const MachineInstr *MI, MCInst &OutMI) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSMCINSTLOWER_H
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