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586e442827
ARM64 was not producing pure BFI instructions for bitfield insertion operations, unlike AArch64. The approach had to be a little different (in ISelDAGToDAG rather than ISelLowering), and the outcomes aren't identical but hopefully this gives it similar power. This should address PR19424. llvm-svn: 207102
26 lines
715 B
LLVM
26 lines
715 B
LLVM
; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-apple-darwin -arm64-strict-align | FileCheck %s --check-prefix=CHECK-STRICT
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define i32 @f0(i32* nocapture %p) nounwind {
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; CHECK-STRICT: ldrh [[HIGH:w[0-9]+]], [x0, #2]
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; CHECK-STRICT: ldrh [[LOW:w[0-9]+]], [x0]
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; CHECK-STRICT: bfm [[LOW]], [[HIGH]], #16, #15
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; CHECK-STRICT: ret
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; CHECK: ldr w0, [x0]
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; CHECK: ret
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%tmp = load i32* %p, align 2
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ret i32 %tmp
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}
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define i64 @f1(i64* nocapture %p) nounwind {
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; CHECK-STRICT: ldp w[[LOW:[0-9]+]], w[[HIGH:[0-9]+]], [x0]
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; CHECK-STRICT: bfm x[[LOW]], x[[HIGH]], #32, #31
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; CHECK-STRICT: ret
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; CHECK: ldr x0, [x0]
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; CHECK: ret
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%tmp = load i64* %p, align 4
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ret i64 %tmp
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}
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