1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
llvm-mirror/test/CodeGen/Mips/selTBtnezSlti.ll
David Blaikie ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00

26 lines
749 B
LLVM

; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
@i = global i32 1, align 4
@j = global i32 2, align 4
@a = global i32 5, align 4
@.str = private unnamed_addr constant [9 x i8] c"%i = 2 \0A\00", align 1
@k = common global i32 0, align 4
define void @t() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
entry:
%0 = load i32, i32* @a, align 4
%cmp = icmp slt i32 %0, 10
%1 = load i32, i32* @j, align 4
%2 = load i32, i32* @i, align 4
%cond = select i1 %cmp, i32 %1, i32 %2
store i32 %cond, i32* @i, align 4
ret void
}
attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
; 16: slti ${{[0-9]+}}, 10
; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}