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dfc6457da2
so that we can use it to get the old-style JIT out of the subtarget. This code should be removed when the old-style JIT is removed (imminently). llvm-svn: 214560
95 lines
3.2 KiB
C++
95 lines
3.2 KiB
C++
//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PPC_TARGETMACHINE_H
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#define PPC_TARGETMACHINE_H
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#include "PPCInstrInfo.h"
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#include "PPCSubtarget.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
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///
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class PPCTargetMachine : public LLVMTargetMachine {
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PPCSubtarget Subtarget;
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public:
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PPCTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL, bool is64Bit);
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const PPCInstrInfo *getInstrInfo() const override {
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return getSubtargetImpl()->getInstrInfo();
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}
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const PPCFrameLowering *getFrameLowering() const override {
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return getSubtargetImpl()->getFrameLowering();
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}
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PPCJITInfo *getJITInfo() override { return getSubtargetImpl()->getJITInfo(); }
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const PPCTargetLowering *getTargetLowering() const override {
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return getSubtargetImpl()->getTargetLowering();
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}
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const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
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return getSubtargetImpl()->getSelectionDAGInfo();
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}
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const PPCRegisterInfo *getRegisterInfo() const override {
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return &getInstrInfo()->getRegisterInfo();
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}
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const DataLayout *getDataLayout() const override {
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return getSubtargetImpl()->getDataLayout();
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}
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const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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PPCSubtarget *getSubtargetImpl() override { return &Subtarget; }
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const InstrItineraryData *getInstrItineraryData() const override {
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return &getSubtargetImpl()->getInstrItineraryData();
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}
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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bool addCodeEmitter(PassManagerBase &PM,
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JITCodeEmitter &JCE) override;
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/// \brief Register PPC analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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};
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/// PPC32TargetMachine - PowerPC 32-bit target machine.
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///
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class PPC32TargetMachine : public PPCTargetMachine {
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virtual void anchor();
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public:
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PPC32TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// PPC64TargetMachine - PowerPC 64-bit target machine.
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///
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class PPC64TargetMachine : public PPCTargetMachine {
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virtual void anchor();
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public:
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PPC64TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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