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5ea123d65e
Fix systematically wrong whitespace from a prior automated change. NFC. llvm-svn: 337542
64 lines
1.7 KiB
LLVM
64 lines
1.7 KiB
LLVM
; Test moves between FPRs and GPRs for z196 and zEC12.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check that moves from i32s to floats can use high registers.
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define float @f1(i16 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: llhh [[REG:%r[0-5]]], 0(%r2)
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; CHECK: oihh [[REG]], 16256
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; CHECK: ldgr %f0, [[REG]]
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; CHECK: br %r14
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%base = load i16, i16 *%ptr
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%ext = zext i16 %base to i32
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%full = or i32 %ext, 1065353216
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%res = bitcast i32 %full to float
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ret float %res
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}
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; Check that moves from floats to i32s can use high registers.
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; This "store the low byte" technique is used by llvmpipe, for example.
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define void @f2(float %val, i8 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: lgdr [[REG:%r[0-5]]], %f0
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; CHECK: stch [[REG]], 0(%r2)
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; CHECK: br %r14
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%res = bitcast float %val to i32
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%trunc = trunc i32 %res to i8
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store i8 %trunc, i8 *%ptr
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ret void
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}
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; Like f2, but with a conditional store.
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define void @f3(float %val, i8 *%ptr, i32 %which) {
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; CHECK-LABEL: f3:
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; CHECK: ciblh %r3, 0, 0(%r14)
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; CHECK: lgdr [[REG:%r[0-5]]], %f0
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; CHECK: stch [[REG]], 0(%r2)
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; CHECK: br %r14
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%int = bitcast float %val to i32
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%trunc = trunc i32 %int to i8
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%old = load i8, i8 *%ptr
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%cmp = icmp eq i32 %which, 0
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%res = select i1 %cmp, i8 %trunc, i8 %old
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store i8 %res, i8 *%ptr
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ret void
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}
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; ...and again with 16-bit memory.
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define void @f4(float %val, i16 *%ptr, i32 %which) {
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; CHECK-LABEL: f4:
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; CHECK: ciblh %r3, 0, 0(%r14)
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; CHECK: lgdr [[REG:%r[0-5]]], %f0
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; CHECK: sthh [[REG]], 0(%r2)
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; CHECK: br %r14
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%int = bitcast float %val to i32
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%trunc = trunc i32 %int to i16
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%old = load i16, i16 *%ptr
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%cmp = icmp eq i32 %which, 0
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%res = select i1 %cmp, i16 %trunc, i16 %old
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store i16 %res, i16 *%ptr
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ret void
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}
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