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244 lines
6.7 KiB
LLVM
244 lines
6.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; rdar://7860110
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; RUN: llc -mtriple=x86_64-apple-darwin10.2 < %s | FileCheck %s -check-prefix=X64
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; RUN: llc -mtriple=i686-apple-darwin10.2 -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON
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; RUN: llc -mtriple=i686-apple-darwin10.2 -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
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; X64-LABEL: test1:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movb %sil, (%rdi)
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; X64-NEXT: retq
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;
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; X32-LABEL: test1:
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; X32: ## %bb.0: ## %entry
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movb %al, (%ecx)
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; X32-NEXT: retl
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entry:
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%A = load i32, i32* %a0, align 4
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%B = and i32 %A, -256 ; 0xFFFFFF00
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%C = zext i8 %a1 to i32
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%D = or i32 %C, %B
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store i32 %D, i32* %a0, align 4
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ret void
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}
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define void @test2(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
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; X64-LABEL: test2:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movb %sil, 1(%rdi)
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; X64-NEXT: retq
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;
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; X32-LABEL: test2:
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; X32: ## %bb.0: ## %entry
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movb %al, 1(%ecx)
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; X32-NEXT: retl
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entry:
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%A = load i32, i32* %a0, align 4
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%B = and i32 %A, -65281 ; 0xFFFF00FF
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%C = zext i8 %a1 to i32
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%CS = shl i32 %C, 8
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%D = or i32 %B, %CS
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store i32 %D, i32* %a0, align 4
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ret void
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}
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define void @test3(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
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; X64-LABEL: test3:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movw %si, (%rdi)
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; X64-NEXT: retq
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;
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; X32-BWON-LABEL: test3:
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; X32-BWON: ## %bb.0: ## %entry
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; X32-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWON-NEXT: movw %ax, (%ecx)
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; X32-BWON-NEXT: retl
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;
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; X32-BWOFF-LABEL: test3:
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; X32-BWOFF: ## %bb.0: ## %entry
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; X32-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax
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; X32-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWOFF-NEXT: movw %ax, (%ecx)
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; X32-BWOFF-NEXT: retl
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entry:
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%A = load i32, i32* %a0, align 4
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%B = and i32 %A, -65536 ; 0xFFFF0000
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%C = zext i16 %a1 to i32
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%D = or i32 %B, %C
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store i32 %D, i32* %a0, align 4
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ret void
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}
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define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
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; X64-LABEL: test4:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movw %si, 2(%rdi)
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; X64-NEXT: retq
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;
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; X32-BWON-LABEL: test4:
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; X32-BWON: ## %bb.0: ## %entry
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; X32-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWON-NEXT: movw %ax, 2(%ecx)
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; X32-BWON-NEXT: retl
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;
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; X32-BWOFF-LABEL: test4:
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; X32-BWOFF: ## %bb.0: ## %entry
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; X32-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax
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; X32-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWOFF-NEXT: movw %ax, 2(%ecx)
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; X32-BWOFF-NEXT: retl
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entry:
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%A = load i32, i32* %a0, align 4
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%B = and i32 %A, 65535 ; 0x0000FFFF
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%C = zext i16 %a1 to i32
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%CS = shl i32 %C, 16
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%D = or i32 %B, %CS
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store i32 %D, i32* %a0, align 4
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ret void
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}
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define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp {
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; X64-LABEL: test5:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movw %si, 2(%rdi)
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; X64-NEXT: retq
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;
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; X32-BWON-LABEL: test5:
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; X32-BWON: ## %bb.0: ## %entry
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; X32-BWON-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWON-NEXT: movw %ax, 2(%ecx)
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; X32-BWON-NEXT: retl
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;
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; X32-BWOFF-LABEL: test5:
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; X32-BWOFF: ## %bb.0: ## %entry
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; X32-BWOFF-NEXT: movw {{[0-9]+}}(%esp), %ax
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; X32-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-BWOFF-NEXT: movw %ax, 2(%ecx)
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; X32-BWOFF-NEXT: retl
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entry:
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%A = load i64, i64* %a0, align 4
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%B = and i64 %A, -4294901761 ; 0xFFFFFFFF0000FFFF
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%C = zext i16 %a1 to i64
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%CS = shl i64 %C, 16
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%D = or i64 %B, %CS
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store i64 %D, i64* %a0, align 4
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ret void
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}
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define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp {
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; X64-LABEL: test6:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movb %sil, 5(%rdi)
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; X64-NEXT: retq
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;
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; X32-LABEL: test6:
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; X32: ## %bb.0: ## %entry
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movb %al, 5(%ecx)
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; X32-NEXT: retl
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entry:
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%A = load i64, i64* %a0, align 4
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%B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF
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%C = zext i8 %a1 to i64
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%CS = shl i64 %C, 40
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%D = or i64 %B, %CS
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store i64 %D, i64* %a0, align 4
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ret void
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}
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define i32 @test7(i64* nocapture %a0, i8 zeroext %a1, i32* %P2) nounwind {
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; X64-LABEL: test7:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movl (%rdx), %eax
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; X64-NEXT: movb %sil, 5(%rdi)
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; X64-NEXT: retq
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;
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; X32-LABEL: test7:
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; X32: ## %bb.0: ## %entry
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; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: movb %cl, 5(%edx)
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; X32-NEXT: retl
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entry:
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%OtherLoad = load i32 , i32 *%P2
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%A = load i64, i64* %a0, align 4
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%B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF
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%C = zext i8 %a1 to i64
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%CS = shl i64 %C, 40
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%D = or i64 %B, %CS
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store i64 %D, i64* %a0, align 4
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ret i32 %OtherLoad
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}
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; PR7833
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@g_16 = internal global i32 -1
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define void @test8() nounwind {
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; X64-LABEL: test8:
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; X64: ## %bb.0:
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; X64-NEXT: orb $1, {{.*}}(%rip)
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; X64-NEXT: retq
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;
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; X32-LABEL: test8:
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; X32: ## %bb.0:
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; X32-NEXT: orb $1, _g_16
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; X32-NEXT: retl
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%tmp = load i32, i32* @g_16
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store i32 0, i32* @g_16
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%or = or i32 %tmp, 1
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store i32 %or, i32* @g_16
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ret void
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}
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define void @test9() nounwind {
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; X64-LABEL: test9:
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; X64: ## %bb.0:
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; X64-NEXT: orb $1, {{.*}}(%rip)
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; X64-NEXT: retq
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;
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; X32-LABEL: test9:
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; X32: ## %bb.0:
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; X32-NEXT: orb $1, _g_16
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; X32-NEXT: retl
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%tmp = load i32, i32* @g_16
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%or = or i32 %tmp, 1
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store i32 %or, i32* @g_16
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ret void
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}
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; rdar://8494845 + PR8244
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define i8 @test10(i8* %P) nounwind ssp {
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; X64-LABEL: test10:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: movsbl (%rdi), %eax
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; X64-NEXT: shrl $8, %eax
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; X64-NEXT: ## kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: test10:
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; X32: ## %bb.0: ## %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movsbl (%eax), %eax
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; X32-NEXT: movb %ah, %al
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; X32-NEXT: retl
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entry:
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%tmp = load i8, i8* %P, align 1
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%conv = sext i8 %tmp to i32
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%shr3 = lshr i32 %conv, 8
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%conv2 = trunc i32 %shr3 to i8
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ret i8 %conv2
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}
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