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llvm-mirror/test/Transforms/LoopVectorize/PowerPC/stride-vectorization.ll
Silviu Baranga 7a8e19daa2 [LV] Fix PR26600: avoid out of bounds loads for interleaved access vectorization
Summary:
If we don't have the first and last access of an interleaved load group,
the first and last wide load in the loop can do an out of bounds
access. Even though we discard results from speculative loads,
this can cause problems, since it can technically generate page faults
(or worse).

We now discard interleaved load groups that don't have the first and
load in the group.

Reviewers: hfinkel, rengolin

Subscribers: rengolin, llvm-commits, mzolotukhin, anemet

Differential Revision: http://reviews.llvm.org/D17332

llvm-svn: 261331
2016-02-19 15:46:10 +00:00

37 lines
1.2 KiB
LLVM

; RUN: opt -S -basicaa -loop-vectorize < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind
define void @foo(double* noalias nocapture %a, double* noalias nocapture readonly %b) #0 {
entry:
br label %for.body
; CHECK-LABEL: @foo
; CHECK: <2 x double>
for.cond.cleanup: ; preds = %for.body
ret void
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%0 = shl nsw i64 %indvars.iv, 1
%odd.idx = add nsw i64 %0, 1
%arrayidx = getelementptr inbounds double, double* %b, i64 %0
%arrayidx.odd = getelementptr inbounds double, double* %b, i64 %odd.idx
%1 = load double, double* %arrayidx, align 8
%2 = load double, double* %arrayidx.odd, align 8
%add = fadd double %1, %2
%arrayidx2 = getelementptr inbounds double, double* %a, i64 %indvars.iv
store double %add, double* %arrayidx2, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1600
br i1 %exitcond, label %for.cond.cleanup, label %for.body
}
attributes #0 = { nounwind "target-cpu"="pwr8" }