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e0556c8f84
Fixes the ASan RISC-V memory mapping (originally introduced by D87580 and D87581). This should be an improvement both in terms of first principles soundness and observed test failures --- test failures would occur non-deterministically depending on the ASLR random offset. On RISC-V Linux (64-bit), `TASK_UNMAPPED_BASE` is currently defined as `PAGE_ALIGN(TASK_SIZE / 3)`. The non-power-of-two divisor makes the result be the not very round number 0x1555556000. That address had to be further rounded to ensure page alignment after the shadow scale shifting is applied. Still, that value explains why the mapping table may look less regular than expected. Further cleanups: - Moved the mapping table comment, to ensure that the two Linux/AArch64 tables stayed together; - Removed mention of Sv48. Neither the original mapping nor this one are compatible with an actual Linux Sv48 address space (mainline Linux still operates Sv48 in Sv39 mode). A future patch can improve this; - Removed the additional comments, for consistency. Differential Revision: https://reviews.llvm.org/D97646 |
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| AggressiveInstCombine | ||
| CFGuard | ||
| Coroutines | ||
| Hello | ||
| InstCombine | ||
| Instrumentation | ||
| IPO | ||
| ObjCARC | ||
| Scalar | ||
| Utils | ||
| Vectorize | ||
| CMakeLists.txt | ||