mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-25 14:02:52 +02:00
e0801b07e0
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
44 lines
1.3 KiB
C++
44 lines
1.3 KiB
C++
//===- RegisterInfoEmitter.h - Generate a Register File Desc. ---*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This tablegen backend is responsible for emitting a description of a target
|
|
// register file for a code generator. It uses instances of the Register,
|
|
// RegisterAliases, and RegisterClass classes to gather this information.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef REGISTER_INFO_EMITTER_H
|
|
#define REGISTER_INFO_EMITTER_H
|
|
|
|
#include "TableGenBackend.h"
|
|
|
|
namespace llvm {
|
|
|
|
class RegisterInfoEmitter : public TableGenBackend {
|
|
RecordKeeper &Records;
|
|
public:
|
|
RegisterInfoEmitter(RecordKeeper &R) : Records(R) {}
|
|
|
|
// run - Output the register file description, returning true on failure.
|
|
void run(raw_ostream &o);
|
|
|
|
// runHeader - Emit a header fragment for the register info emitter.
|
|
void runHeader(raw_ostream &o);
|
|
|
|
// runEnums - Print out enum values for all of the registers.
|
|
void runEnums(raw_ostream &o);
|
|
|
|
// runDesc - Print out register descriptions.
|
|
void runDesc(raw_ostream &o);
|
|
};
|
|
|
|
} // End llvm namespace
|
|
|
|
#endif
|