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2ff5f4ceeb
This adds a DeMorgan combine for OR's of compares to turn them into AND's, helping prevent them from going into and out of gpr registers. It also fills in the VCLE and VCLT nodes that MVE can select, allowing it to invert more compares. Differential Revision: https://reviews.llvm.org/D65059 llvm-svn: 366920
3426 lines
118 KiB
LLVM
3426 lines
118 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE
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; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP
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define arm_aapcs_vfpcc <4 x float> @vcmp_oeq_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_oeq_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmp.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it eq
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; CHECK-MVE-NEXT: moveq r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmp.f32 s0, s4
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: vcmp.f32 s3, s7
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; CHECK-MVE-NEXT: it eq
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; CHECK-MVE-NEXT: moveq r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: vcmp.f32 s2, s6
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; CHECK-MVE-NEXT: it eq
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; CHECK-MVE-NEXT: moveq r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: movs r0, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it eq
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; CHECK-MVE-NEXT: moveq r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r0, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
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; CHECK-MVE-NEXT: bx lr
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;
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; CHECK-MVEFP-LABEL: vcmp_oeq_v4f32:
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; CHECK-MVEFP: @ %bb.0: @ %entry
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; CHECK-MVEFP-NEXT: vcmp.f32 eq, q0, q1
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; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
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; CHECK-MVEFP-NEXT: bx lr
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entry:
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%c = fcmp oeq <4 x float> %src, %src2
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%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %s
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}
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define arm_aapcs_vfpcc <4 x float> @vcmp_one_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_one_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmp.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: vcmp.f32 s1, s5
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmp.f32 s0, s4
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r2, #1
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; CHECK-MVE-NEXT: vcmp.f32 s3, s7
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r3, #1
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: mov.w r0, #0
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; CHECK-MVE-NEXT: vcmp.f32 s2, s6
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r0, #1
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r0, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
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; CHECK-MVE-NEXT: bx lr
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;
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; CHECK-MVEFP-LABEL: vcmp_one_v4f32:
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; CHECK-MVEFP: @ %bb.0: @ %entry
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; CHECK-MVEFP-NEXT: vcmp.f32 le, q1, q0
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; CHECK-MVEFP-NEXT: movw r1, #65535
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; CHECK-MVEFP-NEXT: vpst
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; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, q1
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; CHECK-MVEFP-NEXT: vmrs r0, p0
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; CHECK-MVEFP-NEXT: eors r0, r1
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; CHECK-MVEFP-NEXT: vmsr p0, r0
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; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
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; CHECK-MVEFP-NEXT: bx lr
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entry:
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%c = fcmp one <4 x float> %src, %src2
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%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %s
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}
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define arm_aapcs_vfpcc <4 x float> @vcmp_ogt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_ogt_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: movs r0, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it gt
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; CHECK-MVE-NEXT: movgt r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r0, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
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; CHECK-MVE-NEXT: bx lr
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;
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; CHECK-MVEFP-LABEL: vcmp_ogt_v4f32:
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; CHECK-MVEFP: @ %bb.0: @ %entry
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; CHECK-MVEFP-NEXT: vcmp.f32 gt, q0, q1
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; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
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; CHECK-MVEFP-NEXT: bx lr
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entry:
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%c = fcmp ogt <4 x float> %src, %src2
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%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %s
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}
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define arm_aapcs_vfpcc <4 x float> @vcmp_oge_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_oge_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it ge
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; CHECK-MVE-NEXT: movge r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
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; CHECK-MVE-NEXT: it ge
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; CHECK-MVE-NEXT: movge r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
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; CHECK-MVE-NEXT: it ge
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; CHECK-MVE-NEXT: movge r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: movs r0, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it ge
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; CHECK-MVE-NEXT: movge r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r0, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
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; CHECK-MVE-NEXT: bx lr
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;
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; CHECK-MVEFP-LABEL: vcmp_oge_v4f32:
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; CHECK-MVEFP: @ %bb.0: @ %entry
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; CHECK-MVEFP-NEXT: vcmp.f32 ge, q0, q1
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; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
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; CHECK-MVEFP-NEXT: bx lr
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entry:
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%c = fcmp oge <4 x float> %src, %src2
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%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %s
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}
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define arm_aapcs_vfpcc <4 x float> @vcmp_olt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_olt_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: movs r0, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it mi
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; CHECK-MVE-NEXT: movmi r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r0, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
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; CHECK-MVE-NEXT: bx lr
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;
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; CHECK-MVEFP-LABEL: vcmp_olt_v4f32:
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; CHECK-MVEFP: @ %bb.0: @ %entry
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; CHECK-MVEFP-NEXT: vcmp.f32 gt, q1, q0
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; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
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; CHECK-MVEFP-NEXT: bx lr
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entry:
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%c = fcmp olt <4 x float> %src, %src2
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%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %s
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}
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define arm_aapcs_vfpcc <4 x float> @vcmp_ole_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
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; CHECK-MVE-LABEL: vcmp_ole_v4f32:
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; CHECK-MVE: @ %bb.0: @ %entry
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; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
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; CHECK-MVE-NEXT: movs r1, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it ls
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; CHECK-MVE-NEXT: movls r1, #1
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; CHECK-MVE-NEXT: cmp r1, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r1, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r2, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
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; CHECK-MVE-NEXT: it ls
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; CHECK-MVE-NEXT: movls r2, #1
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; CHECK-MVE-NEXT: cmp r2, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r2, #1
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: mov.w r3, #0
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; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
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; CHECK-MVE-NEXT: it ls
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; CHECK-MVE-NEXT: movls r3, #1
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; CHECK-MVE-NEXT: cmp r3, #0
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; CHECK-MVE-NEXT: it ne
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; CHECK-MVE-NEXT: movne r3, #1
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; CHECK-MVE-NEXT: movs r0, #0
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; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
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; CHECK-MVE-NEXT: it ls
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; CHECK-MVE-NEXT: movls r0, #1
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; CHECK-MVE-NEXT: cmp r0, #0
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; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ole_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 ge, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ole <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_ueq_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ueq_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmp.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: vcmp.f32 s1, s5
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f32 s0, s4
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r2, #1
|
|
; CHECK-MVE-NEXT: vcmp.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r3, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: mov.w r0, #0
|
|
; CHECK-MVE-NEXT: vcmp.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r0, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ueq_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ueq <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_une_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_une_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmp.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmp.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmp.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_une_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 ne, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp une <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_ugt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ugt_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ugt_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 ge, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ugt <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_uge_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_uge_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_uge_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 gt, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp uge <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_ult_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ult_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ult_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 ge, q0, q1
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ult <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_ule_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ule_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ule_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 gt, q0, q1
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ule <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_ord_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ord_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ord_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, q1
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ord <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <4 x float> @vcmp_uno_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_uno_v4f32:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s1, s5
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s0, s4
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r2, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s3, s7
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: mov.w r3, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f32 s2, s6
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r3, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r3, #1
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r3, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_uno_v4f32:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f32 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp uno <4 x float> %src, %src2
|
|
%s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
|
|
ret <4 x float> %s
|
|
}
|
|
|
|
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_oeq_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp oeq <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_one_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r2, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r0, #1
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_one_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q1
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp one <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ogt_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it gt
|
|
; CHECK-MVE-NEXT: movgt r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ogt <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_oge_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ge
|
|
; CHECK-MVE-NEXT: movge r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp oge <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_olt_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it mi
|
|
; CHECK-MVE-NEXT: movmi r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp olt <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ole_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ls
|
|
; CHECK-MVE-NEXT: movls r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ole <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ueq_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r2, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r1, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it eq
|
|
; CHECK-MVE-NEXT: moveq r0, #1
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ueq <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_une_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_une_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp une <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ugt_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it hi
|
|
; CHECK-MVE-NEXT: movhi r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ugt <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_uge_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it pl
|
|
; CHECK-MVE-NEXT: movpl r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp uge <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ult_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it lt
|
|
; CHECK-MVE-NEXT: movlt r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ult <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ule_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it le
|
|
; CHECK-MVE-NEXT: movle r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ule <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_ord_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vc
|
|
; CHECK-MVE-NEXT: movvc r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: movw r1, #65535
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, q1
|
|
; CHECK-MVEFP-NEXT: vmrs r0, p0
|
|
; CHECK-MVEFP-NEXT: eors r0, r1
|
|
; CHECK-MVEFP-NEXT: vmsr p0, r0
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp ord <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|
|
|
|
define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
|
|
; CHECK-MVE-LABEL: vcmp_uno_v8f16:
|
|
; CHECK-MVE: @ %bb.0: @ %entry
|
|
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1]
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
|
|
; CHECK-MVE-NEXT: vmov s16, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
|
|
; CHECK-MVE-NEXT: vmov r1, s16
|
|
; CHECK-MVE-NEXT: movs r0, #0
|
|
; CHECK-MVE-NEXT: vmov s16, r2
|
|
; CHECK-MVE-NEXT: movs r2, #0
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
|
|
; CHECK-MVE-NEXT: vmov s16, r3
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r2, #1
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r2, #1
|
|
; CHECK-MVE-NEXT: vmov s18, r3
|
|
; CHECK-MVE-NEXT: cmp r2, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
|
|
; CHECK-MVE-NEXT: vmov r2, s16
|
|
; CHECK-MVE-NEXT: vmov.16 q4[0], r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[1], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
|
|
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
|
|
; CHECK-MVE-NEXT: vmov s20, r1
|
|
; CHECK-MVE-NEXT: movs r1, #0
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
|
|
; CHECK-MVE-NEXT: vmov s20, r2
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r1, #1
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r1, #1
|
|
; CHECK-MVE-NEXT: vmov s22, r2
|
|
; CHECK-MVE-NEXT: cmp r1, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
|
|
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
|
|
; CHECK-MVE-NEXT: vmov s2, r2
|
|
; CHECK-MVE-NEXT: vmov r1, s20
|
|
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
|
|
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
|
|
; CHECK-MVE-NEXT: vmov s0, r1
|
|
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
|
|
; CHECK-MVE-NEXT: it vs
|
|
; CHECK-MVE-NEXT: movvs r0, #1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
|
|
; CHECK-MVE-NEXT: it ne
|
|
; CHECK-MVE-NEXT: movne r0, #1
|
|
; CHECK-MVE-NEXT: vmov s2, r1
|
|
; CHECK-MVE-NEXT: cmp r0, #0
|
|
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
|
|
; CHECK-MVE-NEXT: vmov r0, s0
|
|
; CHECK-MVE-NEXT: vmov.16 q4[7], r0
|
|
; CHECK-MVE-NEXT: vmov q0, q4
|
|
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
|
|
; CHECK-MVE-NEXT: bx lr
|
|
;
|
|
; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:
|
|
; CHECK-MVEFP: @ %bb.0: @ %entry
|
|
; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0
|
|
; CHECK-MVEFP-NEXT: vpst
|
|
; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, q1
|
|
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
|
|
; CHECK-MVEFP-NEXT: bx lr
|
|
entry:
|
|
%c = fcmp uno <8 x half> %src, %src2
|
|
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
|
|
ret <8 x half> %s
|
|
}
|