1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00
Owen Anderson e0ceaab206 Change more of the guts of CodeGenRegister's RegUnit tracking to be based on bit vectors.
This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units. This is highly beneficial to TableGen runtime on targets with large, dense register files. This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case.

llvm-svn: 227678
2015-01-31 07:49:41 +00:00
..
2014-03-29 10:18:08 +00:00
2014-06-13 15:21:50 +00:00
2014-06-08 22:29:17 +00:00
2015-01-20 21:23:15 +00:00
2003-10-16 23:46:01 +00:00
2007-12-29 20:37:13 +00:00
2014-10-16 20:00:02 +00:00
2006-08-09 19:40:13 +00:00
2013-01-02 09:10:48 +00:00
2010-08-04 16:11:24 +00:00
2012-01-26 22:06:23 +00:00
2014-06-23 17:58:39 +00:00
2014-01-24 17:20:08 +00:00