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e01dc73ad2
All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
59 lines
1.9 KiB
C++
59 lines
1.9 KiB
C++
//===-- AVRRegisterInfo.h - AVR Register Information Impl -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the AVR implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_REGISTER_INFO_H
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#define LLVM_AVR_REGISTER_INFO_H
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "AVRGenRegisterInfo.inc"
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namespace llvm {
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/// Utilities relating to AVR registers.
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class AVRRegisterInfo : public AVRGenRegisterInfo {
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public:
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AVRRegisterInfo();
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public:
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const uint16_t *
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getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
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const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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CallingConv::ID CC) const override;
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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const TargetRegisterClass *
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getLargestLegalSuperClass(const TargetRegisterClass *RC,
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const MachineFunction &MF) const override;
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/// Stack Frame Processing Methods
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void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
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unsigned FIOperandNum,
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RegScavenger *RS = NULL) const override;
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unsigned getFrameRegister(const MachineFunction &MF) const override;
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const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF,
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unsigned Kind = 0) const override;
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/// Splits a 16-bit `DREGS` register into the lo/hi register pair.
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/// \param Reg A 16-bit register to split.
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void splitReg(unsigned Reg, unsigned &LoReg, unsigned &HiReg) const;
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};
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} // end namespace llvm
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#endif // LLVM_AVR_REGISTER_INFO_H
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