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5343bbad35
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators. Work was done by lama.saba@intel.com. llvm-svn: 202262
68 lines
1.3 KiB
LLVM
68 lines
1.3 KiB
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
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; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
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; The test checks that LLVM does not misread bitwise instructions from
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; older bitcode files.
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define void @shl(i8 %x1){
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entry:
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; CHECK: %res1 = shl i8 %x1, %x1
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%res1 = shl i8 %x1, %x1
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; CHECK: %res2 = shl nuw i8 %x1, %x1
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%res2 = shl nuw i8 %x1, %x1
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; CHECK: %res3 = shl nsw i8 %x1, %x1
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%res3 = shl nsw i8 %x1, %x1
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; CHECK: %res4 = shl nuw nsw i8 %x1, %x1
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%res4 = shl nuw nsw i8 %x1, %x1
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ret void
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}
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define void @lshr(i8 %x1){
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entry:
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; CHECK: %res1 = lshr i8 %x1, %x1
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%res1 = lshr i8 %x1, %x1
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; CHECK: %res2 = lshr exact i8 %x1, %x1
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%res2 = lshr exact i8 %x1, %x1
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ret void
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}
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define void @ashr(i8 %x1){
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entry:
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; CHECK: %res1 = ashr i8 %x1, %x1
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%res1 = ashr i8 %x1, %x1
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; CHECK-NEXT: %res2 = ashr exact i8 %x1, %x1
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%res2 = ashr exact i8 %x1, %x1
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ret void
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}
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define void @and(i8 %x1){
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entry:
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; CHECK: %res1 = and i8 %x1, %x1
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%res1 = and i8 %x1, %x1
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ret void
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}
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define void @or(i8 %x1){
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entry:
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; CHECK: %res1 = or i8 %x1, %x1
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%res1 = or i8 %x1, %x1
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ret void
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}
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define void @xor(i8 %x1){
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entry:
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; CHECK: %res1 = xor i8 %x1, %x1
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%res1 = xor i8 %x1, %x1
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ret void
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} |